Re: [PATCH v12 5/5] sample: rust: pci: add tests for config space routines

["Alexandre Courbot" <acourbot@nvidia.com>]

On Thu Jan 22, 2026 at 1:31 PM JST, Alexandre Courbot wrote:
> On Thu Jan 22, 2026 at 5:22 AM JST, Zhi Wang wrote:
>> Add tests exercising the PCI configuration space helpers.
>>
>> Suggested-by: Danilo Krummrich <dakr@kernel.org>
>> Signed-off-by: Zhi Wang <zhiw@nvidia.com>
>> ---
>>  samples/rust/rust_driver_pci.rs | 28 ++++++++++++++++++++++++++++
>>  1 file changed, 28 insertions(+)
>>
>> diff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci.rs
>> index 38c949efce38..1bc5bd1a8df5 100644
>> --- a/samples/rust/rust_driver_pci.rs
>> +++ b/samples/rust/rust_driver_pci.rs
>> @@ -5,6 +5,7 @@
>>  //! To make this driver probe, QEMU must be run with `-device pci-testdev`.
>>  
>>  use kernel::{
>> +    device::Bound,
>>      device::Core,
>>      devres::Devres,
>>      io::Io,
>> @@ -65,6 +66,32 @@ fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> {
>>  
>>          Ok(bar.read32(Regs::COUNT))
>>      }
>> +
>> +    fn config_space(pdev: &pci::Device<Bound>) -> Result {
>> +        let config = pdev.config_space()?;
>> +
>> +        // TODO: use the register!() macro for defining PCI configuration space registers once it
>
> I'll rebase the `register!` series on top of this and try to address
> this item.

Actually... is this expected to work?

> +        dev_info!(
> +            pdev.as_ref(),
> +            "pci-testdev config space read8 rev ID: {:x}\n",
> +            config.read8(0x8)
> +        );

We are performing I/O on `config`, but since this is a sample device
with no hardware backing, what is providing the data for the registers?