From: "Gary Guo" <gary@garyguo.net>
To: "Zhi Wang" <zhiw@nvidia.com>, "Gary Guo" <gary@garyguo.net>
Cc: <rust-for-linux@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <dakr@kernel.org>,
<aliceryhl@google.com>, <bhelgaas@google.com>,
<kwilczynski@kernel.org>, <ojeda@kernel.org>,
<alex.gaynor@gmail.com>, <boqun.feng@gmail.com>,
<bjorn3_gh@protonmail.com>, <lossin@kernel.org>,
<a.hindborg@kernel.org>, <tmgross@umich.edu>,
<markus.probst@posteo.de>, <helgaas@kernel.org>,
<cjia@nvidia.com>, <smitra@nvidia.com>, <ankita@nvidia.com>,
<aniketa@nvidia.com>, <kwankhede@nvidia.com>,
<targupta@nvidia.com>, <acourbot@nvidia.com>,
<joelagnelf@nvidia.com>, <jhubbard@nvidia.com>,
<zhiwang@kernel.org>, <daniel.almeida@collabora.com>
Subject: Re: [RFC 2/2] pci: Add PCI capability infrastructure and SR-IOV capability support
Date: Thu, 05 Feb 2026 13:10:15 +0000 [thread overview]
Message-ID: <DG71X1RAJCVY.LJADBXREZ4XD@garyguo.net> (raw)
In-Reply-To: <20260205135547.2ffc0df4@inno-thin-ubuntu>
On Thu Feb 5, 2026 at 11:57 AM GMT, Zhi Wang wrote:
> On Tue, 27 Jan 2026 15:36:29 +0000
> "Gary Guo" <gary@garyguo.net> wrote:
>
> snip
>
>> > +/// Marker for normal (legacy) PCI capabilities.
>> > +impl CapabilityKind for Normal {
>> > + type IdType = u8;
>> > + const START_OFFSET: usize = bindings::PCI_CAPABILITY_LIST as
>> > usize; +}
>> > +
>> > +/// Marker for extended PCI capabilities.
>> > +impl CapabilityKind for Extended {
>> > + type IdType = u16;
>> > + const START_OFFSET: usize = bindings::PCI_CFG_SPACE_SIZE as
>> > usize; +}
>> > +
>> > +/// A PCI capability.
>> > +///
>> > +/// This type represents a discovered PCI capability and provides
>> > safe access +/// to its registers. All I/O operations are relative
>> > to the capability's +/// base offset in configuration space.
>> > +pub struct Capability<'a, S: ConfigSpaceKind, K: CapabilityKind> {
>> > + config_space: &'a ConfigSpace<'a, S>,
>> > + offset: usize,
>> > + id: K::IdType,
>> > + size: usize,
>> > +}
>>
>> Some thoughts about this: given that the IDs are different for PCI
>> capability and PCI extended capabilities, it feels that we shouldn't
>> overlap them into the same type.
>>
>
> Make sense. Sorry for the late reply as I was evaluating what would be
> the impact of IoCapable trait refinement to this patch.
There's a few discussions about this recently and I think we've determined a
generic infrastrucutre for a subview of a I/O region is desired. I'm going to
work on this in the upcoming weeks and would report my progress on Zulip. Let's
coordinate there.
>
>> The `offset` and `size` feels like it can be something more generic,
>> something like
>>
>> /// A subview into I/O.
>> pub struct IoView<T> {
>> io: T,
>> offset: usize,
>> size: usize,
>> }
>>
>> impl<T: IO> IoView<T> {
>> // ....
>> }
>>
>> This is just like a slice, but act on arbitrary IO.
>>
>> The capability enumeration can just be something like
>>
>> fn capabilities(&self) -> impl Iterator<Item = (CapabilityId,
>> IoView<&Self>)>
>>
>> and another method for capabilities_ext.
>>
>
> I actually had a version of that, but dropped it. The C side already
> handles finding capabilities by ID, so a Rust iterator seemed redundant
> for the common case. Unless we need to handle multiple capabilities
> with the same ID (which is rare). IMO, it might be better we add it when
> a rust driver really need this.
If we're not going to expose any API that support enumeration at all, then what
you say makes sense.
>
>> If you want to add typed capabilities, an option is to have
>>
>> enum Capability<'a> {
>> SpecificParsedCapability,
>> Other(CapabilityId, IoView<&ConfigSpace<...>>),
>> }
>>
>
> But given that the kernel's C API favors looking up by ID, usage of an
> enum might be slightly awkward here (e.g., calling find_capability(ID)
> and still having to unwrap an enum)?
Indeed. What you have there makes sense for typed capability lookup.
Best,
Gary
prev parent reply other threads:[~2026-02-05 13:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-26 21:59 [RFC 0/2] Rust PCI capability infrastructure and SR-IOV support Zhi Wang
2026-01-26 21:59 ` [RFC 1/2] pci: Add fallible I/O methods to ConfigSpace Zhi Wang
2026-01-26 21:59 ` [RFC 2/2] pci: Add PCI capability infrastructure and SR-IOV capability support Zhi Wang
2026-01-27 15:36 ` Gary Guo
2026-02-05 11:57 ` Zhi Wang
2026-02-05 13:10 ` Gary Guo [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=DG71X1RAJCVY.LJADBXREZ4XD@garyguo.net \
--to=gary@garyguo.net \
--cc=a.hindborg@kernel.org \
--cc=acourbot@nvidia.com \
--cc=alex.gaynor@gmail.com \
--cc=aliceryhl@google.com \
--cc=aniketa@nvidia.com \
--cc=ankita@nvidia.com \
--cc=bhelgaas@google.com \
--cc=bjorn3_gh@protonmail.com \
--cc=boqun.feng@gmail.com \
--cc=cjia@nvidia.com \
--cc=dakr@kernel.org \
--cc=daniel.almeida@collabora.com \
--cc=helgaas@kernel.org \
--cc=jhubbard@nvidia.com \
--cc=joelagnelf@nvidia.com \
--cc=kwankhede@nvidia.com \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lossin@kernel.org \
--cc=markus.probst@posteo.de \
--cc=ojeda@kernel.org \
--cc=rust-for-linux@vger.kernel.org \
--cc=smitra@nvidia.com \
--cc=targupta@nvidia.com \
--cc=tmgross@umich.edu \
--cc=zhiw@nvidia.com \
--cc=zhiwang@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox