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charset=UTF-8 Date: Wed, 25 Feb 2026 22:50:43 +0900 Message-Id: Cc: "Danilo Krummrich" , "Alice Ryhl" , "Daniel Almeida" , "Miguel Ojeda" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Andreas Hindborg" , "Trevor Gross" , "Boqun Feng" , "Yury Norov" , "John Hubbard" , "Alistair Popple" , "Joel Fernandes" , "Timur Tabi" , "Edwin Peer" , "Eliot Courtney" , "Steven Price" , , Subject: Re: [PATCH v7 00/10] rust: add `register!` macro From: "Alexandre Courbot" To: "Dirk Behme" References: <20260224-register-v7-0-aad44f760f33@nvidia.com> In-Reply-To: X-ClientProxiedBy: TY4PR01CA0096.jpnprd01.prod.outlook.com (2603:1096:405:37d::19) To CH2PR12MB3990.namprd12.prod.outlook.com (2603:10b6:610:28::18) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PR12MB3990:EE_|LV3PR12MB9188:EE_ X-MS-Office365-Filtering-Correlation-Id: 20b8d38f-3b82-4d75-293e-08de7474e2a2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|10070799003|1800799024|7416014|376014; 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>>=20 >> to this arguably more natural one: >>=20 >> let boot0 =3D bar.read(regs::NV_PMC_BOOT_0); >>=20 >> This revision is based on `driver-core-testing` as of 2026-02-24 with >> [1] applied. A tree with this series and its dependencies is available >> at [2]. >>=20 >> [1] https://lore.kernel.org/all/20260206-io-v2-0-71dea20a06e6@nvidia.com= / >> [2] https://github.com/Gnurou/linux/tree/b4/register >>=20 >> The first patch enables the `generic_arg_infer` feature, which is >> required for generic type inference and used in subsequent patches. This >> feature is stable since rustc 1.89. >>=20 >> The second patch adds `shr` and `shl` methods to `Bounded`. These were >> suggested by Alice during LPC as a way to avoid the use of the >> controversial `Bounded::from_expr` in both the bitfield macro and the >> Nova code. The third patch adds another convenience method to obtain a >> `bool` from single-bit `Bounded`s, while the fourth patch turns >> `Bounded::get` into a const method in order to make register setter >> methods const. >>=20 >> Patches 5 and 6 introduce the `IoLoc` and `IoWrite` types around which >> I/O accesses are centered. This allows registers to be accessed using >> the same `read` and `write` methods as primitive types. >>=20 >> Patch 7 adds the `register!` macro and the types it requires. >>=20 >> Patch 8 updates the Rust PCI sample driver to use `register!`, as per >> its TODO item. >>=20 >> Patch 9 illustrates more extensively how this macro is used by >> converting nova-core to use it, and removing the local implementation. >> This patch is to be merged one cycle after the other patches. >>=20 >> Patch 10 is an RFC allowing a shorter write syntax to be used in the >> case of fixed or relative registers. It doesn't need to be merged >> immediately, but I think it is a good time to discuss it. >>=20 >> I have also removed Gary's signoff on patches 5 and 7 to make sure it >> doesn't get merged before he gives it explicitly. >>=20 >> Signed-off-by: Alexandre Courbot >>=20 >> --- >> Changes in v7: >> - Use `RES + SHIFT >=3D N` instead of `RES >=3D N - SHIFT` in >> `Bounded::shr`. >> - Rename `IoRef` to `IoLoc` and all related types >> accordingly. >> - Use `Into` trait bounds in both directions on `IoLoc`. >> - Add RFC patch allowing fixed register values to be used directly with >> `write`. >> - Link to v6: https://patch.msgid.link/20260216-register-v6-0-eec9a4de9e= 9e@nvidia.com >>=20 >> Changes in v6: >> - Remove Tested-by tags as the code has considerably changed. >> - Make `Bounded::get` const so it can be used with registers. >> - Use the `pin_init::zeroed()` const function instead of defining our >> own method. >> - Generalize all `Io` around the new `IoRef` and `IoWrite` types, and >> make registers use these as well. >> - Use the more natural pattern of having the `Io` type perform the I/O >> access instead of the register type. >> - Convert the whole PCI driver example, and not only the PCI >> configuration space. >> - Rename `Bounded::as_bool` to `Bounded::into_bool`. >> - Drop `Bounded::into_inner` in favor of making `Bounded::get` const. >> - Link to v5: https://patch.msgid.link/20260129-register-v5-0-c4587c9025= 14@nvidia.com >>=20 >> Changes in v5: >> - Rename all setters to `with_*` and `with_const_*`. >> - Use `, stride =3D ` to specify the stride of register arrays. >> - Remove `Deref` requirement on the `RegisterIo` trait and make it >> `#[doc(hidden)`. >> - Simplify the top dispatch rule a bit. >> - Link to v4: https://patch.msgid.link/20260128-register-v4-0-aee3a33d96= 49@nvidia.com >>=20 >> Changes in v4: >> - Add `with_` const field setter methods (removing the need to call >> `Bounded::new` for constant field values). >> - Add `into_inner` const method for `Bounded`. >> - Add `from_raw` and const `zeroed` method to create initial register >> values. >> - More documentation improvements. >> - Link to v3: https://patch.msgid.link/20260126-register-v3-0-2328a59d73= 12@nvidia.com >>=20 >> Changes in v3: >> - Sort the Rust features list alphabetically. >> - Rebase on top of latest `driver-core-next` including the new Io trait. >> - Allow several registers to be defined from the same macro invocation. >> - Remove references to `bitfield!` macro. >> - Fix doccomment of `shr` and `shl`. >> - Use `+` syntax for relative register offsets. >> - Move register arrays size and stride to after the backing type declara= tion. >> - Use regular doccomments to document registers and fields (thanks Gary!= ). >> - Remove `Default` implementation and implement the more predictable >> `Zeroable` instead. >> - Improve doccomments a bit. >> - Link to v2: https://patch.msgid.link/20260121-register-v2-0-79d9b8d5e3= 6a@nvidia.com >>=20 >> Changes in v2: >> - Remove `bitfield!` and put its rules into `register!` to give it more >> time to get reviewed. >> - Allow output type larger than strictly required for `shr` and `shl` on >> `Bounded`. >> - Enable the `generic_arg_infer` feature, required for rustc < 1.89. >> - Link to v1: https://patch.msgid.link/20260120-register-v1-0-723a1743b5= 57@nvidia.com >>=20 >> --- >> Alexandre Courbot (10): >> rust: enable the `generic_arg_infer` feature >> rust: num: add `shr` and `shl` methods to `Bounded` >> rust: num: add `into_bool` method to `Bounded` >> rust: num: make Bounded::get const >> rust: io: add IoLoc and IoWrite types >> rust: io: use generic read/write accessors for primitive accesses >> rust: io: add `register!` macro >> sample: rust: pci: use `register!` macro >> [FOR REFERENCE] gpu: nova-core: use the kernel `register!` macro >> RFC: rust: io: allow fixed register values directly in `write` >>=20 >> drivers/gpu/nova-core/falcon.rs | 249 +++---- >> drivers/gpu/nova-core/falcon/gsp.rs | 23 +- >> drivers/gpu/nova-core/falcon/hal/ga102.rs | 65 +- >> drivers/gpu/nova-core/falcon/hal/tu102.rs | 11 +- >> drivers/gpu/nova-core/falcon/sec2.rs | 17 +- >> drivers/gpu/nova-core/fb.rs | 6 +- >> drivers/gpu/nova-core/fb/hal/ga100.rs | 40 +- >> drivers/gpu/nova-core/fb/hal/ga102.rs | 7 +- >> drivers/gpu/nova-core/fb/hal/tu102.rs | 22 +- >> drivers/gpu/nova-core/gfw.rs | 11 +- >> drivers/gpu/nova-core/gpu.rs | 36 +- >> drivers/gpu/nova-core/gsp/boot.rs | 11 +- >> drivers/gpu/nova-core/gsp/cmdq.rs | 10 +- >> drivers/gpu/nova-core/regs.rs | 544 ++++++++------ >> drivers/gpu/nova-core/regs/macros.rs | 739 ------------------- >> rust/kernel/io.rs | 347 +++++++-- >> rust/kernel/io/register.rs | 1135 +++++++++++++++++++++= ++++++++ >> rust/kernel/lib.rs | 3 + >> rust/kernel/num/bounded.rs | 70 +- >> samples/rust/rust_driver_pci.rs | 84 ++- >> scripts/Makefile.build | 3 +- >> 21 files changed, 2118 insertions(+), 1315 deletions(-) >> --- >> base-commit: 545225ee0b0b6998c7b6ff888f8497681b8b35c4 >> change-id: 20260117-register-ccaba1d21713 > > > I converted my simple aarch64 TMU timer example [1] over to v7 (many=20 > thanks helping with that!) and gave it a try: It works like with v2.=20 > With that: > > Tested-by: Dirk Behme Really appreciated! And I think we are finally converging, so hopefully no more big refactoring ahead. :) Still, please let me know if you saw anything that looked off during the conversion.