Re: [PATCH v9 9/9] gpu: nova-core: use the Generic Bootloader to boot FWSEC on Turing

["Alexandre Courbot" <acourbot@nvidia.com>]

On Tue Feb 24, 2026 at 11:31 AM JST, Eliot Courtney wrote:
> On Thu Feb 12, 2026 at 5:26 PM JST, Alexandre Courbot wrote:
>> +        let dmem_desc = {
>> +            let imem_sec = FalconDmaLoadable::imem_sec_load_params(&firmware);
>> +            let imem_ns = FalconDmaLoadable::imem_ns_load_params(&firmware).ok_or(EINVAL)?;
>> +            let dmem = FalconDmaLoadable::dmem_load_params(&firmware);
>> +
>> +            BootloaderDmemDescV2 {
>> +                reserved: [0; 4],
>> +                signature: [0; 4],
>> +                ctx_dma: 4, // FALCON_DMAIDX_PHYS_SYS_NCOH
>> +                code_dma_base: firmware.dma_handle(),
>> +                non_sec_code_off: imem_ns.dst_start,
>> +                non_sec_code_size: imem_ns.len,
>> +                sec_code_off: imem_sec.dst_start,
>> +                sec_code_size: imem_sec.len,
>> +                code_entry_point: 0,
>> +                data_dma_base: firmware.dma_handle() + u64::from(dmem.src_start),
>> +                data_size: dmem.len,
>> +                argc: 0,
>> +                argv: 0,
>> +            }
>> +        };
>> +
>> +        // The bootloader's code must be loaded in the area right below the first 64K of IMEM.
>> +        const BOOTLOADER_LOAD_CEILING: u32 = num::usize_into_u32::<{ sizes::SZ_64K }>();
>> +        let imem_dst_start = BOOTLOADER_LOAD_CEILING
>> +            .checked_sub(desc.code_size)
>> +            .ok_or(EOVERFLOW)?;
>
> Are there any alignment requirements for `imem_dst_start`? Or maybe
> `code_size` is always such that the alignment will be fine?

Looking at OpenRM, there are indeed! I will integrate them into the next
revision. Thanks for pointing this out.