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charset=UTF-8 Date: Fri, 06 Mar 2026 10:41:44 +0900 Message-Id: Cc: "John Hubbard" , "Alistair Popple" , "Joel Fernandes" , "Timur Tabi" , "Edwin Peer" , "Eliot Courtney" , , , , , "dri-devel" Subject: Re: [PATCH v10 01/10] gpu: nova-core: create falcon firmware DMA objects lazily From: "Eliot Courtney" To: "Alexandre Courbot" , "Danilo Krummrich" , "Alice Ryhl" , "David Airlie" , "Simona Vetter" X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260301-turing_prep-v10-0-dde5ee437c60@nvidia.com> <20260301-turing_prep-v10-1-dde5ee437c60@nvidia.com> In-Reply-To: <20260301-turing_prep-v10-1-dde5ee437c60@nvidia.com> X-ClientProxiedBy: TY4P301CA0050.JPNP301.PROD.OUTLOOK.COM (2603:1096:405:36b::9) To BL0PR12MB2353.namprd12.prod.outlook.com (2603:10b6:207:4c::31) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL0PR12MB2353:EE_|DM4PR12MB7648:EE_ X-MS-Office365-Filtering-Correlation-Id: 0e04df59-1d65-467b-d6cc-08de7b2187a4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|10070799003|1800799024; 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This will also have the nice side-effect of being more fit for > PIO loading. > > Signed-off-by: Alexandre Courbot > --- > drivers/gpu/nova-core/falcon.rs | 57 ++++++++++++------- > drivers/gpu/nova-core/firmware.rs | 38 ++++++------- > drivers/gpu/nova-core/firmware/booter.rs | 33 +++++------ > drivers/gpu/nova-core/firmware/fwsec.rs | 96 ++++++++++----------------= ------ > drivers/gpu/nova-core/gsp/boot.rs | 2 +- > 5 files changed, 99 insertions(+), 127 deletions(-) > > diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falc= on.rs > index 37bfee1d0949..8d444cf9d55c 100644 > --- a/drivers/gpu/nova-core/falcon.rs > +++ b/drivers/gpu/nova-core/falcon.rs > @@ -2,12 +2,13 @@ > =20 > //! Falcon microprocessor base support > =20 > -use core::ops::Deref; > - > use hal::FalconHal; > =20 > use kernel::{ > - device, > + device::{ > + self, > + Device, // > + }, > dma::{ > DmaAddress, > DmaMask, // > @@ -15,9 +16,7 @@ > io::poll::read_poll_timeout, > prelude::*, > sync::aref::ARef, > - time::{ > - Delta, // > - }, > + time::Delta, nit: Missing // guard here. > diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-c= ore/firmware/fwsec.rs > index df3d8de14ca1..9349c715a5a4 100644 > --- a/drivers/gpu/nova-core/firmware/fwsec.rs > +++ b/drivers/gpu/nova-core/firmware/fwsec.rs > @@ -10,10 +10,7 @@ > //! - The command to be run, as this firmware can perform several tasks = ; > //! - The ucode signature, so the GSP falcon can run FWSEC in HS mode. > =20 > -use core::{ > - marker::PhantomData, > - ops::Deref, // > -}; > +use core::marker::PhantomData; > =20 > use kernel::{ > device::{ > @@ -28,7 +25,6 @@ > }; > =20 > use crate::{ > - dma::DmaObject, > driver::Bar0, > falcon::{ > gsp::Gsp, > @@ -40,7 +36,7 @@ > }, > firmware::{ > FalconUCodeDesc, > - FirmwareDmaObject, > + FirmwareObject, > FirmwareSignature, > Signed, > Unsigned, // > @@ -174,52 +170,21 @@ fn as_ref(&self) -> &[u8] { > =20 > impl FirmwareSignature for Bcrt30Rsa3kSignature {} > =20 > -/// Reinterpret the area starting from `offset` in `fw` as an instance o= f `T` (which must implement > -/// [`FromBytes`]) and return a reference to it. > -/// > -/// # Safety > -/// > -/// * Callers must ensure that the device does not read/write to/from me= mory while the returned > -/// reference is live. > -/// * Callers must ensure that this call does not race with a write to t= he same region while > -/// the returned reference is live. > -unsafe fn transmute(fw: &DmaObject, offset: usize)= -> Result<&T> { > - // SAFETY: The safety requirements of the function guarantee the dev= ice won't read > - // or write to memory while the reference is alive and that this cal= l won't race > - // with writes to the same memory region. > - T::from_bytes(unsafe { fw.as_slice(offset, size_of::())? }).ok_or= (EINVAL) > -} > - > -/// Reinterpret the area starting from `offset` in `fw` as a mutable ins= tance of `T` (which must > -/// implement [`FromBytes`]) and return a reference to it. > -/// > -/// # Safety > -/// > -/// * Callers must ensure that the device does not read/write to/from me= mory while the returned > -/// slice is live. > -/// * Callers must ensure that this call does not race with a read or wr= ite to the same region > -/// while the returned slice is live. > -unsafe fn transmute_mut( > - fw: &mut DmaObject, > - offset: usize, > -) -> Result<&mut T> { > - // SAFETY: The safety requirements of the function guarantee the dev= ice won't read > - // or write to memory while the reference is alive and that this cal= l won't race > - // with writes or reads to the same memory region. > - T::from_bytes_mut(unsafe { fw.as_slice_mut(offset, size_of::())? = }).ok_or(EINVAL) > -} > - > /// The FWSEC microcode, extracted from the BIOS and to be run on the GS= P falcon. > /// > /// It is responsible for e.g. carving out the WPR2 region as the first = step of the GSP bootflow. > pub(crate) struct FwsecFirmware { > /// Descriptor of the firmware. > desc: FalconUCodeDesc, > - /// GPU-accessible DMA object containing the firmware. > - ucode: FirmwareDmaObject, > + /// Object containing the firmware binary. > + ucode: FirmwareObject, > } > =20 > impl FalconLoadParams for FwsecFirmware { > + fn as_slice(&self) -> &[u8] { > + self.ucode.0.as_slice() > + } > + > fn imem_sec_load_params(&self) -> FalconLoadTarget { > self.desc.imem_sec_load_params() > } > @@ -245,23 +210,15 @@ fn boot_addr(&self) -> u32 { > } > } > =20 > -impl Deref for FwsecFirmware { > - type Target =3D DmaObject; > - > - fn deref(&self) -> &Self::Target { > - &self.ucode.0 > - } > -} > - > impl FalconFirmware for FwsecFirmware { > type Target =3D Gsp; > } > =20 > -impl FirmwareDmaObject { > - fn new_fwsec(dev: &Device, bios: &Vbios, cmd: FwsecCo= mmand) -> Result { > +impl FirmwareObject { > + fn new_fwsec(bios: &Vbios, cmd: FwsecCommand) -> Result { > let desc =3D bios.fwsec_image().header()?; > - let ucode =3D bios.fwsec_image().ucode(&desc)?; > - let mut dma_object =3D DmaObject::from_data(dev, ucode)?; > + let mut ucode =3D KVVec::new(); > + ucode.extend_from_slice(bios.fwsec_image().ucode(&desc)?, GFP_KE= RNEL)?; > =20 > let hdr_offset =3D desc > .imem_load_size() > @@ -269,8 +226,9 @@ fn new_fwsec(dev: &Device, bios: &Vbio= s, cmd: FwsecCommand) -> Re > .map(usize::from_safe_cast) > .ok_or(EINVAL)?; > =20 > - // SAFETY: we have exclusive access to `dma_object`. > - let hdr: &FalconAppifHdrV1 =3D unsafe { transmute(&dma_object, h= dr_offset) }?; > + let hdr =3D FalconAppifHdrV1::from_bytes_prefix(&ucode[hdr_offse= t..]) > + .ok_or(EINVAL)? > + .0; Is it worth adding // PANIC: comments like we have in some other areas of the codebase for each of these indexes into ucode? Other than those two optional nits, Reviewed-by: Eliot Courtney