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The parameter > type changes from pci::Device to pci::Device > because the DMA call requires the Core device state. > > Also makes Chipset::arch() const, adds Spec::chipset() accessor, and > makes Spec::new() pub(crate) for use by later patches. > > No functional change: the same 47-bit DMA mask is applied. > > Cc: Danilo Krummrich > Cc: Gary Guo > Signed-off-by: John Hubbard > --- > drivers/gpu/nova-core/driver.rs | 15 -------- > drivers/gpu/nova-core/gpu.rs | 64 ++++++++++++++++++++++----------- > 2 files changed, 43 insertions(+), 36 deletions(-) > > diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driv= er.rs > index 84b0e1703150..e07f7122b35c 100644 > --- a/drivers/gpu/nova-core/driver.rs > +++ b/drivers/gpu/nova-core/driver.rs > @@ -4,8 +4,6 @@ > auxiliary, > device::Core, > devres::Devres, > - dma::Device, > - dma::DmaMask, > pci, > pci::{ > Class, > @@ -38,14 +36,6 @@ pub(crate) struct NovaCore { > =20 > const BAR0_SIZE: usize =3D SZ_16M; > =20 > -// For now we only support Ampere which can use up to 47-bit DMA address= es. > -// > -// TODO: Add an abstraction for this to support newer GPUs which may sup= port > -// larger DMA addresses. Limiting these GPUs to smaller address widths w= on't > -// have any adverse affects, unless installed on systems which require l= arger > -// DMA addresses. These systems should be quite rare. > -const GPU_DMA_BITS: u32 =3D 47; > - > pub(crate) type Bar0 =3D pci::Bar; > =20 > kernel::pci_device_table!( > @@ -84,11 +74,6 @@ fn probe(pdev: &pci::Device, _info: &Self::IdInf= o) -> impl PinInit pdev.enable_device_mem()?; > pdev.set_master(); > =20 > - // SAFETY: No concurrent DMA allocations or mappings can be = made because > - // the device is still being probed and therefore isn't bein= g used by > - // other threads of execution. > - unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::())? }; I think the reason why this was in driver.rs is that the method we are in (`probe`) is enough to justify the safety argument. Whereas `Gpu::new` can technically be called at a different time, and the safety requirement becomes more difficult to justify - we would actually need to make `Gpu::new` unsafe and set its own `SAFETY` section to cover the safety requirement of `dma_set_mask_and_coherent`. So I think it is preferable to keep this part as-is. > - > let bar =3D Arc::pin_init( > pdev.iomap_region_sized::(0, c"nova-core/bar0= "), > GFP_KERNEL, > diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs > index 3b4ccc3d18b9..a7f1957880ff 100644 > --- a/drivers/gpu/nova-core/gpu.rs > +++ b/drivers/gpu/nova-core/gpu.rs > @@ -3,6 +3,10 @@ > use kernel::{ > device, > devres::Devres, > + dma::{ > + Device, > + DmaMask, // > + }, > fmt, > pci, > prelude::*, > @@ -162,6 +166,10 @@ pub(crate) enum Architecture { > Blackwell =3D 0x1b, > } > =20 > +// TODO: Set the DMA mask per-architecture. Hopper and Blackwell support= 52-bit > +// DMA addresses. For now, use 47-bit which is correct for Turing, Amper= e, and Ada. > +const GPU_DMA_BITS: u32 =3D 47; > + > impl TryFrom for Architecture { > type Error =3D Error; > =20 > @@ -211,7 +219,7 @@ pub(crate) struct Spec { > } > =20 > impl Spec { > - fn new(dev: &device::Device, bar: &Bar0) -> Result { > + pub(crate) fn new(dev: &device::Device, bar: &Bar0) -> Result = { The visibility of this methods doesn't need to be changed with the current code - although it will per the next patch if we keep the DMA mask setup in `driver.rs`. If we opt for that direction, let's merge that part into the next patch.