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charset=UTF-8 Date: Mon, 23 Mar 2026 23:33:48 +0900 Message-Id: Cc: "Danilo Krummrich" , "Abdiel Janulgue" , "Daniel Almeida" , "Robin Murphy" , "Andreas Hindborg" , "Miguel Ojeda" , "Boqun Feng" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Alice Ryhl" , "Trevor Gross" , "David Airlie" , "Simona Vetter" , "John Hubbard" , "Alistair Popple" , "Joel Fernandes" , "Timur Tabi" , "Zhi Wang" , "Eliot Courtney" , , , Subject: Re: [PATCH 2/7] gpu: nova-core: firmware: riscv: use dma::Coherent From: "Alexandre Courbot" To: "Gary Guo" References: <20260321-b4-nova-dma-removal-v1-0-5cf18a75ff64@nvidia.com> <20260321-b4-nova-dma-removal-v1-2-5cf18a75ff64@nvidia.com> In-Reply-To: X-ClientProxiedBy: TYCPR01CA0113.jpnprd01.prod.outlook.com (2603:1096:405:4::29) To CH2PR12MB3990.namprd12.prod.outlook.com (2603:10b6:610:28::18) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PR12MB3990:EE_|SA1PR12MB6847:EE_ X-MS-Office365-Filtering-Correlation-Id: 37c8cb04-b680-4da5-adfc-08de88e93402 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|10070799003|376014|7416014|22082099003|56012099003|18002099003; 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>>>> =20 >>>> use crate::{ >>>> - dma::DmaObject, >>>> firmware::BinFirmware, >>>> num::FromSafeCast, // >>>> }; >>>> @@ -66,7 +66,7 @@ pub(crate) struct RiscvFirmware { >>>> /// Application version. >>>> pub(crate) app_version: u32, >>>> /// Device-mapped firmware image. >>>> - pub(crate) ucode: DmaObject, >>>> + pub(crate) ucode: Coherent<[u8]>, >>>> } >>>> =20 >>>> impl RiscvFirmware { >>>> @@ -81,7 +81,7 @@ pub(crate) fn new(dev: &device::Device, fw: &Firmware) -> Result< >>>> let len =3D usize::from_safe_cast(bin_fw.hdr.data_size); >>>> let end =3D start.checked_add(len).ok_or(EINVAL)?; >>>> =20 >>>> - DmaObject::from_data(dev, fw.data().get(start..end).ok_or= (EINVAL)?)? >>>> + Coherent::from_slice(dev, fw.data().get(start..end).ok_or= (EINVAL)?, GFP_KERNEL)? >>> >>> `DmaObject` rounds the data up to be page-sized, while this new API doe= sn't. >>> >>> It has impact on alignment, as the allocator aligns things to the large= st >>> power-of-two exponent of the allocated size. >> >> Doesn't `dma_alloc_coherent` always allocate from the page pool and thus >> returns page-aligned memory though? > > Oh you're right, this is not from DMA pool, so allocations are page-align= ed > indeed. > > I brought this up because I got bite by this size adjustment behaviour > because in the `from_data` I initially put > > unsafe { dma_obj.as_mut().copy_from_slice(data) }; > > but that doesn't work due to the size being aligned up so dma_obj.len() != =3D > data.len(). > > But if this behaviour is not needed it does simplify things quite a bit. I was contemplating hardening the `Coherent` allocations by padding the structs when there are specific alignment needs (in nova-core it's only a couple of types affected), but then thought this was quite restrictive and should be handled by an alignment parameter on `Coherent` directly - and `Coherent` doesn't have such a parameter because the underlying C API doesn't either, and the page alignment seems to be a property of the API itself. Maybe that point is worth mentioning in the documentation of `Coherent`? > >> I'm not sure why `DmaObject` was doing that but it was redundant I think= . > > A question for yourself I guess? :-) > > https://lore.kernel.org/all/20250619-nova-frts-v6-13-ecf41ef99252@nvidia.= com/ Ha, I was precisely wondering who was the lesser engineer who wrote that. := )