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charset=UTF-8 Date: Mon, 20 Apr 2026 15:37:42 +0900 Message-Id: From: "Eliot Courtney" To: "Timur Tabi" , "Danilo Krummrich" , "Alexandre Courbot" , "John Hubbard" , "Gary Guo" , "Joel Fernandes" , "Eliot Courtney" , Subject: Re: [PATCH v5 5/6] gpu: nova-core: skip the IFR header if present X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260417191359.1307434-1-ttabi@nvidia.com> <20260417191359.1307434-6-ttabi@nvidia.com> In-Reply-To: <20260417191359.1307434-6-ttabi@nvidia.com> X-ClientProxiedBy: SY5P300CA0080.AUSP300.PROD.OUTLOOK.COM (2603:10c6:10:247::14) To BL0PR12MB2353.namprd12.prod.outlook.com (2603:10b6:207:4c::31) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL0PR12MB2353:EE_|SA1PR12MB8842:EE_ X-MS-Office365-Filtering-Correlation-Id: 12ce04d1-5f38-4f66-6678-08de9ea756e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|366016|376014|56012099003|18002099003|22082099003; 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When present, the PROM shadow > method must parse this header to determine the offset where the PCI ROM > images actually begin, and adjust all subsequent reads accordingly. > > On most GPUs this is not needed because the IFR microcode has already > applied the ROM offset so that PROM reads transparently skip the header. > On GA100, for whatever reason, the IFR offset is not applied to PROM > reads. Therefore, the search for the PCI expansion must skip the IFR > header, if found. > > Signed-off-by: Timur Tabi > --- > drivers/gpu/nova-core/vbios.rs | 85 +++++++++++++++++++++++++++++++++- > 1 file changed, 84 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios= .rs > index e726594eb130..6bcfb6c5cf44 100644 > --- a/drivers/gpu/nova-core/vbios.rs > +++ b/drivers/gpu/nova-core/vbios.rs > @@ -12,6 +12,8 @@ > Alignable, > Alignment, // > }, > + register, > + sizes::SZ_4K, > sync::aref::ARef, > transmute::FromBytes, > }; > @@ -89,13 +91,94 @@ struct VbiosIterator<'a> { > last_found: bool, > } > =20 > +// IFR Header in VBIOS. > + > +register! { > + pub(crate) NV_PBUS_IFR_FMT_FIXED0(u32) @ 0x300000 { > + 31:0 signature; > + } > +} > + > +register! { > + pub(crate) NV_PBUS_IFR_FMT_FIXED1(u32) @ 0x300004 { > + 30:16 fixed_data_size; > + 15:8 version =3D> u8; > + } > +} > + > +register! { > + pub(crate) NV_PBUS_IFR_FMT_FIXED2(u32) @ 0x300008 { > + 19:0 total_data_size; > + } > +} > + > +/// Return the byte offset where the PCI Expansion ROM images begin in t= he GPU's ROM. > +/// > +/// The GPU's ROM may begin with an Init-from-ROM (IFR) header that prec= edes > +/// the PCI Expansion ROM images (VBIOS). When present, the PROM shadow > +/// method must parse this header to determine the offset where the PCI = ROM > +/// images actually begin, and adjust all subsequent reads accordingly. > +/// > +/// On most GPUs this is not needed because the IFR microcode has alread= y > +/// applied the ROM offset so that PROM reads transparently skip the hea= der. > +/// On GA100, for some reason, the IFR offset is not applied to PROM > +/// reads. Therefore, the search for the PCI expansion must skip the IF= R > +/// header, if found. > +fn vbios_rom_offset(dev: &device::Device, bar0: &Bar0) -> Result = { > + /// IFR signature. > + const NV_PBUS_IFR_FMT_FIXED0_SIGNATURE_VALUE: u32 =3D u32::from_le_b= ytes(*b"NVGI"); > + /// ROM directory signature. > + const NV_ROM_DIRECTORY_IDENTIFIER: u32 =3D u32::from_le_bytes(*b"RFR= D"); > + /// Offset of the NV_PMGR_ROM_ADDR_OFFSET register in IFR Extended s= ection. > + const IFR_SW_EXT_ROM_ADDR_OFFSET: usize =3D 4; > + /// Size of Redundant Firmware Flash Status section. > + const RFW_FLASH_STATUS_SIZE: usize =3D SZ_4K; > + /// Offset in the ROM Directory of the PCI Option ROM offset > + const PCI_OPTION_ROM_OFFSET: usize =3D 8; > + > + let signature =3D bar0.read(NV_PBUS_IFR_FMT_FIXED0).signature(); > + > + if signature =3D=3D NV_PBUS_IFR_FMT_FIXED0_SIGNATURE_VALUE { > + let fixed1 =3D bar0.read(NV_PBUS_IFR_FMT_FIXED1); > + > + match fixed1.version() { > + 1 | 2 =3D> { > + let fixed_data_size =3D usize::from(fixed1.fixed_data_si= ze()); > + let pmgr_rom_addr_offset =3D fixed_data_size + IFR_SW_EX= T_ROM_ADDR_OFFSET; > + bar0.try_read32(ROM_OFFSET + pmgr_rom_addr_offset) > + .map(usize::from_safe_cast) > + } > + 3 =3D> { > + let fixed2 =3D bar0.read(NV_PBUS_IFR_FMT_FIXED2); > + let total_data_size =3D usize::from(fixed2.total_data_si= ze()); > + let flash_status_offset =3D > + usize::from_safe_cast(bar0.try_read32(ROM_OFFSET + t= otal_data_size)?); > + let dir_offset =3D flash_status_offset + RFW_FLASH_STATU= S_SIZE; > + let dir_sig =3D bar0.try_read32(ROM_OFFSET + dir_offset)= ?; > + if dir_sig !=3D NV_ROM_DIRECTORY_IDENTIFIER { > + dev_err!(dev, "could not find IFR ROM directory\n"); > + return Err(EINVAL); > + } > + bar0.try_read32(ROM_OFFSET + dir_offset + PCI_OPTION_ROM= _OFFSET) > + .map(usize::from_safe_cast) > + } > + _ =3D> { > + dev_err!(dev, "unsupported IFR header version {}\n", fix= ed1.version()); > + Err(EINVAL) > + } > + } > + } else { > + Ok(0) > + } > +} nit: register! type definitions can be put inside the `vbios_rom_offset` function since they are only used there. And the function itself might be better inside `VbiosIterator`. Alex, if you agree, maybe you could do this on apply but not blocking at all. Thanks Timur! Reviewed-by: Eliot Courtney