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b=geltjk6gYxi7Kag6xcTy4mX8Y8cTm1BTknbFXj8IJhXKM4dKHURgrfqD4JzBabge8ZpBe0Kf2aXl+YOjay6tAgTyNPL6MofK9+04JIah1ZdWcqliIf/XiwDOn/i2nqIllCCPv+P28QZIljOKa96ueMVRPwjEf1HOBFx9CqJz1QU= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=garyguo.net; Received: from LOZP265MB8551.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:4b4::24) by CWXP265MB5624.GBRP265.PROD.OUTLOOK.COM (2603:10a6:400:158::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.292.21; Thu, 6 Aug 2026 11:44:32 +0000 Received: from LOZP265MB8551.GBRP265.PROD.OUTLOOK.COM ([fe80::c07d:488c:d4aa:2a4a]) by LOZP265MB8551.GBRP265.PROD.OUTLOOK.COM ([fe80::c07d:488c:d4aa:2a4a%4]) with mapi id 15.21.0292.019; Thu, 6 Aug 2026 11:44:32 +0000 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Thu, 06 Aug 2026 12:44:31 +0100 Message-Id: To: "Link Mauve" , Cc: "Ethan Plant" , "Michael Garofalo" , "Ash Logan" , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , "Sasha Finkelstein" , "Miguel Ojeda" , "Boqun Feng" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , "Danilo Krummrich" , "Daniel Almeida" , "Tamir Duberstein" , "Alexandre Courbot" , =?utf-8?q?Onur_=C3=96zkan?= , , Subject: Re: [PATCH v2] rust: io: Add a BigEndianMmio wrapper From: "Gary Guo" X-Mailer: aerc 0.21.0 References: <20260806062207.3024012-1-linkmauve@linkmauve.fr> In-Reply-To: <20260806062207.3024012-1-linkmauve@linkmauve.fr> X-ClientProxiedBy: LO4P123CA0281.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:195::16) To LOZP265MB8551.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:4b4::24) Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LOZP265MB8551:EE_|CWXP265MB5624:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a54c2e6-6411-4704-7e26-08def3b01489 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|10070799003|366016|23010399003|1800799024|7416014|376014|5023799004|56012099006|10067099003|6133799003|18002099003|22082099003; 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An alternative approach would be to have a generic wrapper `BigEndian` = where it performs byte-swapping in its `IoCapable` implementation. This is more composable as it works for all I/O. Of course, this means that it won't be using the specialized BE I/O impl, b= ut then the only architectures that have specialized ioread16be are PPC32 and SPARC, so maybe it's a reasonable trade-off to make? Best, Gary > > Signed-off-by: Link Mauve > --- > rust/helpers/io.c | 34 ++++++++++++++++++ > rust/kernel/io.rs | 88 +++++++++++++++++++++++++++++++++++++++++++++-- > 2 files changed, 120 insertions(+), 2 deletions(-) > > Changes since v1: > - Link to v1: > https://lore.kernel.org/rust-for-linux/178598049138.1212746.24431515070= 74972963.b4-review@b4/T/ > - Fix copy/paste mistake in backend docstring (thank you Ethan Plant!) > - Fix safety comment in macro documentation. > > diff --git a/rust/helpers/io.c b/rust/helpers/io.c > index 7ed9a4f77f1b..3bbb86a00d67 100644 > --- a/rust/helpers/io.c > +++ b/rust/helpers/io.c > @@ -120,6 +120,40 @@ __rust_helper void rust_helper_writeq_relaxed(u64 va= lue, void __iomem *addr) > } > #endif > =20 > +__rust_helper u16 rust_helper_ioread16be(const void __iomem *addr) > +{ > + return ioread16be(addr); > +} > + > +__rust_helper u32 rust_helper_ioread32be(const void __iomem *addr) > +{ > + return ioread32be(addr); > +} > + > +#ifdef CONFIG_64BIT > +__rust_helper u64 rust_helper_ioread64be(const void __iomem *addr) > +{ > + return ioread64be(addr); > +} > +#endif > + > +__rust_helper void rust_helper_iowrite16be(u16 value, void __iomem *addr= ) > +{ > + iowrite16be(value, addr); > +} > + > +__rust_helper void rust_helper_iowrite32be(u32 value, void __iomem *addr= ) > +{ > + iowrite32be(value, addr); > +} > + > +#ifdef CONFIG_64BIT > +__rust_helper void rust_helper_iowrite64be(u64 value, void __iomem *addr= ) > +{ > + iowrite64be(value, addr); > +} > +#endif > + > __rust_helper resource_size_t rust_helper_resource_size(struct resource = *res) > { > return resource_size(res); > diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs > index a38c20ba3d23..ab8b7864298a 100644 > --- a/rust/kernel/io.rs > +++ b/rust/kernel/io.rs > @@ -1194,14 +1194,14 @@ impl IoCapable<$ty> for $backend { > #[inline] > fn io_read(view: <$backend as IoBackend>::View<'_, $ty>) -> = $ty { > // SAFETY: `$backend::as_ptr(view)` is a valid pointer f= or MMIO operations for both > - // `MmioBackend` and `RelaxedMmioBackend`. > + // `MmioBackend`, `RelaxedMmioBackend` and `BigEndianMmi= oBackend`. > unsafe { bindings::$read_fn($backend::as_ptr(view).cast_= const().cast()) } > } > =20 > #[inline] > fn io_write(view: <$backend as IoBackend>::View<'_, $ty>, va= lue: $ty) { > // SAFETY: `$backend::as_ptr(view)` is a valid pointer f= or MMIO operations for both > - // `MmioBackend` and `RelaxedMmioBackend`. > + // `MmioBackend`, `RelaxedMmioBackend` and `BigEndianMmi= oBackend`. > unsafe { bindings::$write_fn(value, $backend::as_ptr(vie= w).cast()) } > } > } > @@ -1751,3 +1751,87 @@ macro_rules! io_write { > } > #[doc(inline)] > pub use crate::io_write; > + > +/// [`Mmio`] wrapper using big-endian accessors. > +/// > +/// This type provides an implementation of [`Io`] that uses big-endian = I/O MMIO operands instead of > +/// the regular little-endian ones. > +/// > +/// See [`Mmio::big_endian`] for a usage example. > +#[repr(transparent)] > +pub struct BigEndianMmio<'a, T: ?Sized>(Mmio<'a, T>); > + > +impl Copy for BigEndianMmio<'_, T> {} > +impl Clone for BigEndianMmio<'_, T> { > + #[inline] > + fn clone(&self) -> Self { > + *self > + } > +} > + > +/// I/O Backend for memory-mapped I/O using big-endian accessors. > +pub struct BigEndianMmioBackend; > + > +impl IoBackend for BigEndianMmioBackend { > + type View<'a, T: ?Sized + KnownSize> =3D BigEndianMmio<'a, T>; > + > + #[inline] > + fn as_ptr<'a, T: ?Sized + KnownSize>(view: Self::View<'a, T>) -> *mu= t T { > + MmioBackend::as_ptr(view.0) > + } > + > + #[inline] > + unsafe fn project_view<'a, T: ?Sized + KnownSize, U: ?Sized + KnownS= ize>( > + view: Self::View<'a, T>, > + ptr: *mut U, > + ) -> Self::View<'a, U> { > + // SAFETY: Per safety requirement. > + BigEndianMmio(unsafe { MmioBackend::project_view(view.0, ptr) }) > + } > +} > + > +impl<'a, T: ?Sized + KnownSize> IoBase<'a> for BigEndianMmio<'a, T> { > + type Backend =3D BigEndianMmioBackend; > + type Target =3D T; > + > + #[inline] > + fn as_view(self) -> BigEndianMmio<'a, T> { > + self > + } > +} > + > +impl<'a, T: ?Sized> Mmio<'a, T> { > + /// Returns a [`BigEndianMmio`] reference that performs big-endian I= /O operations. > + /// > + /// Big-endian makes no change to 8-bit accesses, but will invert th= e bytes of 16-, 32- and > + /// 64-bit accesses, to ensure numbers will be read in their correct= order. > + /// > + /// # Examples > + /// > + /// ```no_run > + /// use kernel::io::{ > + /// Io, > + /// Mmio, > + /// Region, > + /// BigEndianMmio, > + /// }; > + /// > + /// fn do_io(io: Mmio<'_, Region<0x100>>) { > + /// // The access is performed using `ioread32be` instead of `re= adl`. > + /// let v =3D io.big_endian().read32(0x10); > + /// } > + /// > + /// ``` > + #[inline] > + pub fn big_endian(self) -> BigEndianMmio<'a, T> { > + BigEndianMmio(self) > + } > +} > + > +// MMIO regions support 8, 16, and 32-bit accesses. > +impl_mmio_io_capable!(BigEndianMmioBackend, u8, readb, writeb); > +impl_mmio_io_capable!(BigEndianMmioBackend, u16, ioread16be, iowrite16be= ); > +impl_mmio_io_capable!(BigEndianMmioBackend, u32, ioread32be, iowrite32be= ); > +// MMIO regions on 64-bit systems also support 64-bit accesses. > +#[cfg(CONFIG_64BIT)] > +impl_mmio_io_capable!(BigEndianMmioBackend, u64, ioread64be, iowrite64be= ); > > base-commit: 1701fda2f58e345c050f4309971bdc07cd6146ba