From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6DA161FCE; Thu, 15 May 2025 13:52:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747317155; cv=none; b=M6oWxadd0amF22cxI09AR6w+waqD0QTGUraboMR1+F2Bm6hS+fzdyoszAe4I7HDeljT5cB+uRWdQiAVqUcFe/YyGQtdki1fGvDjgbny0EU+rBMIbSUdWZZk9S7tL7iXrfJ9GifGKNEY+3TuBWB3pCNkvjdd2KiycfIzEhlfsCzM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747317155; c=relaxed/simple; bh=1goV/IH2W0v4lJhJQXfNOetGBRDKZao2V7PBJPLKVmk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=fAMFn/cfSuXCDAd064qWG6M/RLdLQEJt4MZ4TOmAJUKijTv80tcW2fcePw7NvFDaWS4H5O1+4Nutbbqik6S/AMltANcq4gV9xHq/HYARWQBLeFJ3XTv0o1IhkWXJqR+6OAQOJdy722LRxMkAnmHwvf/gyoFz8F0/pV/SaFNtynw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eQrFOqpE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eQrFOqpE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A8189C4CEEB; Thu, 15 May 2025 13:52:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747317155; bh=1goV/IH2W0v4lJhJQXfNOetGBRDKZao2V7PBJPLKVmk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=eQrFOqpE4RICxz+SJSpwX/Zhfm4M8rhDAaYMYR5OlTf+yluWHNlVedJJHgj9DHGqN g07i7GJ9zzFrPaUFZpYjtnWu9HPWJY1YLm93EzUpJHuYTTxE4dDsA0AcQ66tFTxyl9 mKzko4InbP2tuy5YRklogDJnX4DpTwl9m6d+7Emo7QCzluWnV/NXWI4Tp0PXw/eUIf JmYdmtQuwgtkZMURBAz0wsUrUVrr2nc4+ma9kx8mbaRhlgYE7X+DBzrz1GrwikYj8n abVNlv87C+im4CgkXm/oqjXZVQ03k4MAzJDSFYJA5Dl4JFl2XJKzyvkDw2uku4IHyZ hNkfRoFCjWt3g== Date: Thu, 15 May 2025 15:52:29 +0200 From: Danilo Krummrich To: Daniel Almeida Cc: Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Greg Kroah-Hartman , "Rafael J. Wysocki" , Thomas Gleixner , linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org Subject: Re: [PATCH v3 1/2] rust: irq: add support for request_irq() Message-ID: References: <20250514-topics-tyr-request_irq-v3-0-d6fcc2591a88@collabora.com> <20250514-topics-tyr-request_irq-v3-1-d6fcc2591a88@collabora.com> <39C56E3E-07C6-44BB-B5F6-38090F037032@collabora.com> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, May 15, 2025 at 03:45:28PM +0200, Danilo Krummrich wrote: > On Thu, May 15, 2025 at 10:16:33AM -0300, Daniel Almeida wrote: > > > > >> > > >> Well, not really, because this impl PinInit can be assigned to something larger > > >> that is already pinned, like drm::Device::Data for example, which is (or was) > > >> already behind an Arc, or any other private data in other subsystems. > > >> > > >> IIUC what you proposed has yet another indirection. If we reuse the example > > >> from above, that would be an Arc for the drm Data, and another Arc for the > > >> handler itself? > > > > > > Can't you implement Handler for drm::Device::Data and e.g. make Registration > > > take an Arc? > > > > No, because drivers may need more than one handler. Panthor needs 3, for > > example, for 3 different lines. > > > > > > > > The irq::Registration itself doesn't need to be allocated dynamically, so it'd > > > still be a single allocation, no? > > > > > > > Right, the registrations don't, but the handlers do. > > Why does the handler need to be allocated dynamically? > > What about something like the following? > > pub struct Registration> { ... }; > > pub trait Handler { > fn handle_irq(&T) -> IrqReturn; > } > > // Could be `drm::Device::Data`. > struct MyData { ... }; > > // Implements `Handler`. > struct IRQHandler1; > struct IRQHandler2; > > // `data` is `Arc` > irq::Registration::::new(data, ...); > irq::Registration::::new(data, ...); > > With that you can have as many IRQs as you want without any additional > allocation. Alternatively we could also do the following, which is probably simpler. pub struct Registration { ... }; pub trait Handler { fn handle_irq(&self) -> IrqReturn; } // Could be `drm::Device::Data`. struct MyData { ... }; // Implements `Handler`. struct IRQHandler1(Arc); struct IRQHandler2(Arc); // `data` is `Arc` let handler1 = IRQHandler1::new(data); let handler2 = IRQHandler2::new(data); irq::Registration::new(handler1, ...); irq::Registration::new(handler2, ...);