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[103.168.172.200]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6fd772e45b1sm28095476d6.69.2025.06.27.15.56.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 15:56:41 -0700 (PDT) Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfauth.phl.internal (Postfix) with ESMTP id C069AF40066; Fri, 27 Jun 2025 18:56:40 -0400 (EDT) Received: from phl-mailfrontend-02 ([10.202.2.163]) by phl-compute-04.internal (MEProxy); Fri, 27 Jun 2025 18:56:40 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgdegfeduucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfurfetoffkrfgpnffqhgenuceurghi lhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurh epfffhvfevuffkfhggtggujgesthdtredttddtvdenucfhrhhomhepuehoqhhunhcuhfgv nhhguceosghoqhhunhdrfhgvnhhgsehgmhgrihhlrdgtohhmqeenucggtffrrghtthgvrh hnpeehudfgudffffetuedtvdehueevledvhfelleeivedtgeeuhfegueevieduffeivden ucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquh hnodhmvghsmhhtphgruhhthhhpvghrshhonhgrlhhithihqdeiledvgeehtdeigedqudej jeekheehhedvqdgsohhquhhnrdhfvghngheppehgmhgrihhlrdgtohhmsehfihigmhgvrd hnrghmvgdpnhgspghrtghpthhtohepvdejpdhmohguvgepshhmthhpohhuthdprhgtphht thhopegurghnihgvlhdrrghlmhgvihgurgestgholhhlrggsohhrrgdrtghomhdprhgtph htthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrdgt ohhmpdhrtghpthhtohepmhhrihhprghrugeskhgvrhhnvghlrdhorhhgpdhrtghpthhtoh epthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphhtthhopegrihhrlhhivggu sehgmhgrihhlrdgtohhmpdhrtghpthhtohepshhimhhonhgrsehffhiflhhlrdgthhdprh gtphhtthhopehojhgvuggrsehkvghrnhgvlhdrohhrghdprhgtphhtthhopegrlhgvgidr ghgrhihnohhrsehgmhgrihhlrdgtohhmpdhrtghpthhtohepghgrrhihsehgrghrhihguh hordhnvght X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 27 Jun 2025 18:56:40 -0400 (EDT) Date: Fri, 27 Jun 2025 15:56:39 -0700 From: Boqun Feng To: Daniel Almeida Cc: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Miguel Ojeda , Alex Gaynor , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Stone , Rob Herring , Alice Ryhl , Beata Michalska , Carsten Haitzler , Boris Brezillon , Ashley Smith , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH] Introduce Tyr Message-ID: References: <20250627-tyr-v1-1-cb5f4c6ced46@collabora.com> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250627-tyr-v1-1-cb5f4c6ced46@collabora.com> On Fri, Jun 27, 2025 at 07:34:04PM -0300, Daniel Almeida wrote: [...] > +#[pin_data] > +pub(crate) struct TyrData { > + pub(crate) pdev: ARef, > + > + #[pin] > + clks: Mutex, > + > + #[pin] > + regulators: Mutex, > + > + // Some inforation on the GPU. This is mainly queried by userspace (mesa). > + pub(crate) gpu_info: GpuInfo, > +} > + > +unsafe impl Send for TyrData {} > +unsafe impl Sync for TyrData {} I think you better just mark Clk (which is just a refcount to `struct clk`) and Regulator `Send` and `Sync`? Then `TyrData` will be `Send` and `Sync` automatically. And the total number of `unsafe` in this patch goes down to 1. Regards, Boqun > + [...] > +// This can be queried by userspace to get information about the GPU. > +#[repr(C)] > +pub(crate) struct GpuInfo { > + pub(crate) gpu_id: u32, > + pub(crate) csf_id: u32, > + pub(crate) gpu_rev: u32, > + pub(crate) core_features: u32, > + pub(crate) l2_features: u32, > + pub(crate) tiler_features: u32, > + pub(crate) mem_features: u32, > + pub(crate) mmu_features: u32, > + pub(crate) thread_features: u32, > + pub(crate) max_threads: u32, > + pub(crate) thread_max_workgroup_size: u32, > + pub(crate) thread_max_barrier_size: u32, > + pub(crate) coherency_features: u32, > + pub(crate) texture_features: [u32; 4], > + pub(crate) as_present: u32, > + pub(crate) shader_present: u64, > + pub(crate) tiler_present: u64, > + pub(crate) l2_present: u64, > +} > + [...]