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[103.168.172.201]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-70497d3d3b0sm20963706d6.80.2025.07.11.08.47.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jul 2025 08:47:02 -0700 (PDT) Received: from phl-compute-10.internal (phl-compute-10.phl.internal [10.202.2.50]) by mailfauth.phl.internal (Postfix) with ESMTP id C75A2F4006A; Fri, 11 Jul 2025 11:47:01 -0400 (EDT) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-10.internal (MEProxy); Fri, 11 Jul 2025 11:47:01 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgdegfeejvdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpuffrtefokffrpgfnqfghnecuuegr ihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjug hrpeffhffvvefukfhfgggtugfgjgesthekredttddtjeenucfhrhhomhepuehoqhhunhcu hfgvnhhguceosghoqhhunhdrfhgvnhhgsehgmhgrihhlrdgtohhmqeenucggtffrrghtth gvrhhnpeekhedtgfejteetueelveduhfehffevteeitefhleetteetfeejleejfefgudel ueenucffohhmrghinhepfhhfihdrrhhsnecuvehluhhsthgvrhfuihiivgeptdenucfrrg hrrghmpehmrghilhhfrhhomhepsghoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhn rghlihhthidqieelvdeghedtieegqddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpe epghhmrghilhdrtghomhesfhhigihmvgdrnhgrmhgvpdhnsggprhgtphhtthhopedvledp mhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhighhuvghlrdhojhgvuggrrdhsrg hnughonhhishesghhmrghilhdrtghomhdprhgtphhtthhopehlohhsshhinheskhgvrhhn vghlrdhorhhgpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrh hnvghlrdhorhhgpdhrtghpthhtoheprhhushhtqdhfohhrqdhlihhnuhigsehvghgvrhdr khgvrhhnvghlrdhorhhgpdhrtghpthhtoheplhhkmhhmsehlihhsthhsrdhlihhnuhigrd guvghvpdhrtghpthhtoheplhhinhhugidqrghrtghhsehvghgvrhdrkhgvrhhnvghlrdho rhhgpdhrtghpthhtohepohhjvggurgeskhgvrhhnvghlrdhorhhgpdhrtghpthhtoheprg hlvgigrdhgrgihnhhorhesghhmrghilhdrtghomhdprhgtphhtthhopehgrghrhiesghgr rhihghhuohdrnhgvth X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 11 Jul 2025 11:47:01 -0400 (EDT) Date: Fri, 11 Jul 2025 08:46:59 -0700 From: Boqun Feng To: Miguel Ojeda Cc: Benno Lossin , linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org, lkmm@lists.linux.dev, linux-arch@vger.kernel.org, Miguel Ojeda , Alex Gaynor , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Will Deacon , Peter Zijlstra , Mark Rutland , Wedson Almeida Filho , Viresh Kumar , Lyude Paul , Ingo Molnar , Mitchell Levy , "Paul E. McKenney" , Greg Kroah-Hartman , Linus Torvalds , Thomas Gleixner , Alan Stern , Matthew Wilcox Subject: Re: [PATCH v6 9/9] rust: sync: atomic: Add Atomic<{usize,isize}> Message-ID: References: <20250710060052.11955-1-boqun.feng@gmail.com> <20250710060052.11955-10-boqun.feng@gmail.com> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Jul 11, 2025 at 04:40:15PM +0200, Miguel Ojeda wrote: > On Fri, Jul 11, 2025 at 4:07 PM Boqun Feng wrote: > > > > Thanks Miguel. > > > > Maybe we can do even better: having a type alias mapping to the exact > > i{32,64,128} based on kernel configs? Like > > > > (in kernel/lib.rs or ffi.rs) > > > > // Want to buy a better name ;-) > > #[cfg(CONFIG_128BIT)] > > type isize_mapping = i128; > > #[cfg(CONFIG_64BIT)] > > type isize_mapping = i64; > > #[cfg(not(any(CONFIG_128BIT, CONFIG_64BIT)))] > > type isize_mapping = i32; > > > > similar for usize. > > > > Thoughts? > > Yeah, I wondered about that too, but I don't know how common it will > be (so you may want to keep it local anyway), and I wasn't sure what Sounds good, I will put it locally. > to call it either, because e.g. something like `isize_mapping` sounds > like we are talking about `c_long`. > > What we want is a Rust fixed-width integer of the same size of `isize` > -- so I think you should try to pick a word that evokes a bit that > part. Something like `fixed_isize` or words like `underlying` or > `repr` perhaps? > I end up calling it `isize_atomic_repr`, and create the diff as below: ------------>8 diff --git a/rust/kernel/sync/atomic.rs b/rust/kernel/sync/atomic.rs index 7ff87b2b49d6..bb0d3d49e3f7 100644 --- a/rust/kernel/sync/atomic.rs +++ b/rust/kernel/sync/atomic.rs @@ -53,14 +53,21 @@ fn delta_into_repr(d: Self::Delta) -> Self::Repr { } } +#[allow(non_camel_case_types)] +#[cfg(not(CONFIG_64BIT))] +type isize_atomic_repr = i32; +#[allow(non_camel_case_types)] +#[cfg(CONFIG_64BIT)] +type isize_atomic_repr = i64; + +crate::static_assert!(core::mem::size_of::() == core::mem::size_of::()); +crate::static_assert!(core::mem::align_of::() == core::mem::align_of::()); + // SAFETY: For 32bit kernel, `isize` has the same size and alignment with `i32` and is round-trip // transmutable to it, for 64bit kernel `isize` has the same size and alignment with `i64` and is // round-trip transmutable to it. unsafe impl generic::AllowAtomic for isize { - #[cfg(not(CONFIG_64BIT))] - type Repr = i32; - #[cfg(CONFIG_64BIT)] - type Repr = i64; + type Repr = isize_atomic_repr; } // SAFETY: `isize` is always sound to transmute back from `i32` or `i64` when their sizes are the Seems good? Regards, Boqun > Cheers, > Miguel