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Tue, 23 Dec 2025 11:17:17 -0800 (PST) X-Google-Smtp-Source: AGHT+IEWcWm65pg63KuHNSK7FvILIyANZhLme9Kp0jYEf3fR0k1Qze2WHIz7yDWuBwgWdMwAF/9U/g== X-Received: by 2002:a17:902:e748:b0:295:738f:73fe with SMTP id d9443c01a7336-2a2f2732287mr152444145ad.30.1766517436635; Tue, 23 Dec 2025 11:17:16 -0800 (PST) Received: from localhost ([2607:f2c0:b1e4:8e00:640b:e13f:5257:9d78]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-2a2f3c666casm132973425ad.3.2025.12.23.11.17.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Dec 2025 11:17:16 -0800 (PST) Date: Tue, 23 Dec 2025 14:17:12 -0500 From: Peter Colberg To: Jason Gunthorpe Cc: Danilo Krummrich , Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , Leon Romanovsky , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang Subject: Re: [PATCH 3/8] rust: pci: add {enable,disable}_sriov(), to control SR-IOV capability Message-ID: Mail-Followup-To: Jason Gunthorpe , Danilo Krummrich , Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , Leon Romanovsky , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang References: <20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com> <20251119-rust-pci-sriov-v1-3-883a94599a97@redhat.com> <20251121232833.GH233636@ziepe.ca> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <20251121232833.GH233636@ziepe.ca> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: aLagx9kLNjR8o5-XKbKnNTTxtGrHdDIQhGCMT61hxbA_1766517438 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Nov 21, 2025 at 07:28:33PM -0400, Jason Gunthorpe wrote: > On Wed, Nov 19, 2025 at 05:19:07PM -0500, Peter Colberg wrote: > > Add methods to enable and disable the Single Root I/O Virtualization > > (SR-IOV) capability for a PCI device. The wrapped C methods take care > > of validating whether the device is a Physical Function (PF), whether > > SR-IOV is currently disabled (or enabled), and whether the number of > > requested VFs does not exceed the total number of supported VFs. > > > > Suggested-by: Danilo Krummrich > > Signed-off-by: Peter Colberg > > --- > > rust/kernel/pci.rs | 30 ++++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs > > index 814990d386708fe2ac652ccaa674c10a6cf390cb..556a01ed9bc3b1300a3340a3d2383e08ceacbfe5 100644 > > --- a/rust/kernel/pci.rs > > +++ b/rust/kernel/pci.rs > > @@ -454,6 +454,36 @@ pub fn set_master(&self) { > > // SAFETY: `self.as_raw` is guaranteed to be a pointer to a valid `struct pci_dev`. > > unsafe { bindings::pci_set_master(self.as_raw()) }; > > } > > + > > + /// Enable the Single Root I/O Virtualization (SR-IOV) capability for this device, > > + /// where `nr_virtfn` is number of Virtual Functions (VF) to enable. > > + #[cfg(CONFIG_PCI_IOV)] > > + pub fn enable_sriov(&self, nr_virtfn: i32) -> Result { > > + // SAFETY: > > + // `self.as_raw` returns a valid pointer to a `struct pci_dev`. > > + // > > + // `pci_enable_sriov()` checks that the enable operation is valid: > > + // - the device is a Physical Function (PF), > > + // - SR-IOV is currently disabled, and > > + // - `nr_virtfn` does not exceed the total number of supported VFs. > > + let ret = unsafe { bindings::pci_enable_sriov(self.as_raw(), nr_virtfn) }; > > + if ret != 0 { > > + return Err(crate::error::Error::from_errno(ret)); > > + } > > + Ok(()) > > + } > > + > > + /// Disable the Single Root I/O Virtualization (SR-IOV) capability for this device. > > + #[cfg(CONFIG_PCI_IOV)] > > + pub fn disable_sriov(&self) { > > + // SAFETY: > > + // `self.as_raw` returns a valid pointer to a `struct pci_dev`. > > + // > > + // `pci_disable_sriov()` checks that the disable operation is valid: > > + // - the device is a Physical Function (PF), and > > + // - SR-IOV is currently enabled. > > + unsafe { bindings::pci_disable_sriov(self.as_raw()) }; > > + } > > Both these functions should only be called on bound devices - the > safety statement should call it out, does the code require it? Yes, these functions are in the Core device context that inherits from the Bound device context, which guarantees that the PF device is bound to a driver. I have added a note to the SAFETY comments. > > Also per my other email SRIOV should be disabled before a driver can > be unbound, this patch should take care of it to not introduce an > dangerous enable_sriov(). Thanks for your review. This has been addressed in v2, which disables SR-IOV before remove() when a PF driver opts in using a new flag sriov_disable_on_remove, which is set by default for a Rust driver. Further, enable_sriov() is prevented during remove() using a new flag inhibit_enable in the pci_sriov structure that is set before and cleared after the PF driver is unbound from the device. Thanks, Peter > > Jason >