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[103.168.172.200]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-88d9680c323sm219001636d6.13.2025.12.29.03.58.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Dec 2025 03:58:58 -0800 (PST) Received: from phl-compute-05.internal (phl-compute-05.internal [10.202.2.45]) by mailfauth.phl.internal (Postfix) with ESMTP id B4441F4007F; Mon, 29 Dec 2025 06:58:57 -0500 (EST) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-05.internal (MEProxy); Mon, 29 Dec 2025 06:58:57 -0500 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefgedrtddtgdejjedtkecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpuffrtefokffrpgfnqfghnecuuegr ihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjug hrpeffhffvvefukfhfgggtuggjsehttdertddttddvnecuhfhrohhmpeeuohhquhhnucfh vghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrthhtvg hrnhephfetvdfgtdeukedvkeeiteeiteejieehvdetheduudejvdektdekfeegvddvhedt necuffhomhgrihhnpehkvghrnhgvlhdrohhrghenucevlhhushhtvghrufhiiigvpedtne curfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquhhnodhmvghsmhhtphgruhhthhhpvghr shhonhgrlhhithihqdeiledvgeehtdeigedqudejjeekheehhedvqdgsohhquhhnrdhfvg hngheppehgmhgrihhlrdgtohhmsehfihigmhgvrdhnrghmvgdpnhgspghrtghpthhtohep udefpdhmohguvgepshhmthhpohhuthdprhgtphhtthhopehfuhhjihhtrgdrthhomhhonh horhhisehgmhgrihhlrdgtohhmpdhrtghpthhtohepohhjvggurgeskhgvrhhnvghlrdho rhhgpdhrtghpthhtoheprgdrhhhinhgusghorhhgsehkvghrnhgvlhdrohhrghdprhgtph htthhopegrlhhitggvrhihhhhlsehgohhoghhlvgdrtghomhdprhgtphhtthhopegsjhho rhhnfegpghhhsehprhhothhonhhmrghilhdrtghomhdprhgtphhtthhopegurghkrheskh gvrhhnvghlrdhorhhgpdhrtghpthhtohepghgrrhihsehgrghrhihguhhordhnvghtpdhr tghpthhtoheplhhoshhsihhnsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehtmhhgrh hoshhssehumhhitghhrdgvughu X-ME-Proxy: Feedback-ID: iad51458e:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 29 Dec 2025 06:58:56 -0500 (EST) Date: Mon, 29 Dec 2025 19:58:48 +0800 From: Boqun Feng To: FUJITA Tomonori Cc: ojeda@kernel.org, a.hindborg@kernel.org, aliceryhl@google.com, bjorn3_gh@protonmail.com, dakr@kernel.org, gary@garyguo.net, lossin@kernel.org, tmgross@umich.edu, acourbot@nvidia.com, rust-for-linux@vger.kernel.org, linux-arch@vger.kernel.org Subject: Re: [PATCH v1 2/3] rust: sync: atomic: Remove workaround macro for i8/i16 BasicOps Message-ID: References: <20251228120546.1602275-1-fujita.tomonori@gmail.com> <20251228120546.1602275-3-fujita.tomonori@gmail.com> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251228120546.1602275-3-fujita.tomonori@gmail.com> On Sun, Dec 28, 2025 at 09:05:45PM +0900, FUJITA Tomonori wrote: > Remove workaround impl_atomic_only_load_and_store_ops macro and use > declare_and_impl_atomic_methods to add AtomicBasicOps support for > i8/i16. > I did the following so that we can drop this ;-) 1. Change function names of [1] and [2] from *{load,store}* to *{read,set}*. 2. Reorder [3] before [4] to avoid introduction of impl_atomic_only_load_and_store_ops!() [1]: https://lore.kernel.org/all/20251211113826.1299077-3-fujita.tomonori@gmail.com/ [2]: https://lore.kernel.org/all/20251211113826.1299077-2-fujita.tomonori@gmail.com/ [3]: https://lore.kernel.org/all/20251228120546.1602275-2-fujita.tomonori@gmail.com/ [4]: https://lore.kernel.org/all/20251211113826.1299077-4-fujita.tomonori@gmail.com/ I also reorder a bit to make the introduction of helpers are grouped together, please see at https://git.kernel.org/pub/scm/linux/kernel/git/boqun/linux.git/log/?h=rust-sync.20251229 I feel this way we have a cleaner history of changes. Thanks! Regards, Boqun > Signed-off-by: FUJITA Tomonori > --- > rust/helpers/atomic_ext.c | 16 +++++----- > rust/kernel/sync/atomic/internal.rs | 48 +---------------------------- > 2 files changed, 9 insertions(+), 55 deletions(-) > > diff --git a/rust/helpers/atomic_ext.c b/rust/helpers/atomic_ext.c > index 3a5ef6bb2776..10733bb4a75e 100644 > --- a/rust/helpers/atomic_ext.c > +++ b/rust/helpers/atomic_ext.c > @@ -4,42 +4,42 @@ > #include > #include > > -__rust_helper s8 rust_helper_atomic_i8_load(s8 *ptr) > +__rust_helper s8 rust_helper_atomic_i8_read(s8 *ptr) > { > return READ_ONCE(*ptr); > } > > -__rust_helper s8 rust_helper_atomic_i8_load_acquire(s8 *ptr) > +__rust_helper s8 rust_helper_atomic_i8_read_acquire(s8 *ptr) > { > return smp_load_acquire(ptr); > } > > -__rust_helper s16 rust_helper_atomic_i16_load(s16 *ptr) > +__rust_helper s16 rust_helper_atomic_i16_read(s16 *ptr) > { > return READ_ONCE(*ptr); > } > > -__rust_helper s16 rust_helper_atomic_i16_load_acquire(s16 *ptr) > +__rust_helper s16 rust_helper_atomic_i16_read_acquire(s16 *ptr) > { > return smp_load_acquire(ptr); > } > > -__rust_helper void rust_helper_atomic_i8_store(s8 *ptr, s8 val) > +__rust_helper void rust_helper_atomic_i8_set(s8 *ptr, s8 val) > { > WRITE_ONCE(*ptr, val); > } > > -__rust_helper void rust_helper_atomic_i8_store_release(s8 *ptr, s8 val) > +__rust_helper void rust_helper_atomic_i8_set_release(s8 *ptr, s8 val) > { > smp_store_release(ptr, val); > } > > -__rust_helper void rust_helper_atomic_i16_store(s16 *ptr, s16 val) > +__rust_helper void rust_helper_atomic_i16_set(s16 *ptr, s16 val) > { > WRITE_ONCE(*ptr, val); > } > > -__rust_helper void rust_helper_atomic_i16_store_release(s16 *ptr, s16 val) > +__rust_helper void rust_helper_atomic_i16_set_release(s16 *ptr, s16 val) > { > smp_store_release(ptr, val); > } > diff --git a/rust/kernel/sync/atomic/internal.rs b/rust/kernel/sync/atomic/internal.rs > index 0634368d10d2..1b2a7933bc14 100644 > --- a/rust/kernel/sync/atomic/internal.rs > +++ b/rust/kernel/sync/atomic/internal.rs > @@ -256,7 +256,7 @@ macro_rules! declare_and_impl_atomic_methods { > } > > declare_and_impl_atomic_methods!( > - [ i32 => atomic, i64 => atomic64 ] > + [ i8 => atomic_i8, i16 => atomic_i16, i32 => atomic, i64 => atomic64 ] > /// Basic atomic operations > pub trait AtomicBasicOps { > /// Atomic read (load). > @@ -273,15 +273,6 @@ fn set[release](a: &AtomicRepr, v: Self) { > } > ); > > -// It is still unclear whether i8/i16 atomics will eventually support > -// the same set of operations as i32/i64, because some architectures > -// do not provide hardware support for the required atomic primitives. > -// Furthermore, supporting Atomic will require even more > -// significant structural changes. > -// > -// To avoid premature refactoring, a separate macro for i8 and i16 is > -// used for now, leaving the existing macros untouched until the overall > -// design requirements are settled. > declare_and_impl_atomic_methods!( > [ i32 => atomic, i64 => atomic64 ] > /// Exchange and compare-and-exchange atomic operations > @@ -332,40 +323,3 @@ fn fetch_add[acquire, release, relaxed](a: &AtomicRepr, v: Self::Delta) -> > } > } > ); > - > -macro_rules! impl_atomic_only_load_and_store_ops { > - ($($ty:ty),* $(,)?) => { > - $( > - impl AtomicBasicOps for $ty { > - paste! { > - #[inline(always)] > - fn atomic_read(a: &AtomicRepr) -> Self { > - // SAFETY: `a.as_ptr()` is valid and properly aligned. > - unsafe { bindings::[< atomic_ $ty _load >](a.as_ptr().cast()) } > - } > - > - #[inline(always)] > - fn atomic_read_acquire(a: &AtomicRepr) -> Self { > - // SAFETY: `a.as_ptr()` is valid and properly aligned. > - unsafe { bindings::[< atomic_ $ty _load_acquire >](a.as_ptr().cast()) } > - } > - > - // Generate atomic_set and atomic_set_release > - #[inline(always)] > - fn atomic_set(a: &AtomicRepr, v: Self) { > - // SAFETY: `a.as_ptr()` is valid and properly aligned. > - unsafe { bindings::[< atomic_ $ty _store >](a.as_ptr().cast(), v) } > - } > - > - #[inline(always)] > - fn atomic_set_release(a: &AtomicRepr, v: Self) { > - // SAFETY: `a.as_ptr()` is valid and properly aligned. > - unsafe { bindings::[< atomic_ $ty _store_release >](a.as_ptr().cast(), v) } > - } > - } > - } > - )* > - }; > -} > - > -impl_atomic_only_load_and_store_ops!(i8, i16); > -- > 2.43.0 >