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Thu, 05 Feb 2026 13:27:12 -0800 (PST) X-Received: by 2002:ac8:598f:0:b0:4ee:1b0e:861a with SMTP id d75a77b69052e-506398477b3mr7895841cf.13.1770326832454; Thu, 05 Feb 2026 13:27:12 -0800 (PST) Received: from localhost ([2607:f2c0:b010:9000:f569:ac10:227c:5156]) by smtp.gmail.com with UTF8SMTPSA id d75a77b69052e-506392902eesm3841121cf.21.2026.02.05.13.27.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Feb 2026 13:27:11 -0800 (PST) Date: Thu, 5 Feb 2026 16:27:10 -0500 From: Peter Colberg To: Jason Gunthorpe Cc: Danilo Krummrich , Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , Leon Romanovsky , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang Subject: Re: [PATCH 3/8] rust: pci: add {enable,disable}_sriov(), to control SR-IOV capability Message-ID: Mail-Followup-To: Jason Gunthorpe , Danilo Krummrich , Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , Leon Romanovsky , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang References: <20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com> <20251119-rust-pci-sriov-v1-3-883a94599a97@redhat.com> <20251121232833.GH233636@ziepe.ca> <20260106012236.GR125261@ziepe.ca> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <20260106012236.GR125261@ziepe.ca> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: br0ZkLjqT2FS97PsB0cR9TkVIeywIsZqjHDp_eqtjmE_1770326833 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Jason, On Mon, Jan 05, 2026 at 09:22:36PM -0400, Jason Gunthorpe wrote: > On Tue, Dec 23, 2025 at 02:17:12PM -0500, Peter Colberg wrote: > > Further, enable_sriov() is prevented during remove() using a new > > flag inhibit_enable in the pci_sriov structure that is set before > > and cleared after the PF driver is unbound from the device. > > Doesn't this need something concurrent safe like a revocable? Thank you for the follow-up and apologies for the delay. I have now posted a v2 series that takes a different approach from what was described earlier, after discussing this further with Danilo. In the v2 patch [1], when the new PCI driver flag managed_sriov is set, which is always the case for Rust, SR-IOV is disabled twice if needed: once before the unbind() callback for a well-behaved driver, and a second time after unbind() for a broken (but nevertheless using safe APIs only) driver that re-enables SR-IOV during unbind(). Together with commit a995fe1a3aa7 ("rust: driver: drop device private data post unbind") which ensures that the device private data for the PF device is still alive until after the function pci_iov_remove() is called and forcibly re-disables SR_IOV if needed, this upholds the safety guarantee which pci::Device::physfn() depends on. As an alternative for preventing SR-IOV management during unbind(), I briefly considered adding a new context, e.g., CoreInternal => Core => CoreUnbind => Bound => Normal, where {enable,disable}_sriov() are implemented by Core but not CoreUnbind, but discarded that solution since it seems too specific to this case to warrant the complexity. Thanks, Peter [1] https://lore.kernel.org/rust-for-linux/20260205-rust-pci-sriov-v2-1-ef9400c7767b@redhat.com/ > > Jason >