Re: [PATCH 0/6] rust: drm: Higher-Ranked Lifetime private data

[Deborah Brouwer <deborah.brouwer@collabora.com>]

On Thu, May 07, 2026 at 11:38:37AM +0200, Danilo Krummrich wrote:
> On Thu May 7, 2026 at 12:05 AM CEST, Danilo Krummrich wrote:
> > Danilo Krummrich (6):
> >   rust: drm: Add Driver::ParentDevice associated type
> >   rust: drm: Add UnbindGuard for drm_dev_enter/exit critical sections
> >   rust: drm: Add RegistrationData to drm::Driver
> >   rust: drm: Wrap ioctl dispatch in UnbindGuard
> >   rust: drm: Pass registration data to ioctl handlers
> >   rust: drm: Pass bound parent device to ioctl handlers
> 
> Deborah, following up on your question in the other thread, this is roughly how
> you'd use this in Tyr.

Hi Danilo,

Thanks for this advice, I've been working on applying these changes
to Tyr's MCU/firmware boot series. One problem i've had is that we used
to be able to get an unregistered device without providing the drm::Driver
type Data like this:

let unreg_dev = drm::UnregisteredDevice::<TyrDrmDriver>::new(pdev)?;

Then Tyr used that unregistered device to create a gem::shmem::Object
and initialize a gpuvm tree which we used to map the shared memory
to load the firmware.

Has the design changed so that the drm::Driver type Data must be
provided now to get the unregistered devices? Like this?

let unreg_dev = drm::UnregisteredDevice::<TyrDrmDriver>::new(pdev, data)?;

Just checking that this is what we need to work with? If so, I was
thinking of just simplifying the firmware boot to use a small coherent
dma allocation instead like this:
https://gitlab.freedesktop.org/dbrouwer/linux/-/merge_requests/3/diffs?commit_id=39be9140e22c6252317082a1424a66c35dc004b3

Could you let me know if this aligns with your driver core changes?

Deborah

> 
> diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs
> index 7ac3707823b6..447e53c0eecf 100644
> --- a/drivers/gpu/drm/tyr/driver.rs
> +++ b/drivers/gpu/drm/tyr/driver.rs
> @@ -37,13 +37,17 @@
>      regs, //
>  };
> 
> -pub(crate) type IoMem = kernel::io::Mmio<SZ_2M>;
> +pub(crate) type IoMem<'bound> = kernel::io::mem::IoMem<'bound, SZ_2M>;
> 
>  pub(crate) struct TyrDrmDriver;
> 
>  /// Convenience type alias for the DRM device type for this driver.
>  pub(crate) type TyrDrmDevice<Ctx = drm::Registered> = drm::Device<TyrDrmDriver, Ctx>;
> 
> +pub(crate) struct RegData<'bound> {
> +    pub(crate) iomem: IoMem<'bound>,
> +}
> +
>  #[pin_data(PinnedDrop)]
>  pub(crate) struct TyrPlatformDriverData {
>      _device: ARef<TyrDrmDevice>,
> @@ -65,7 +69,7 @@ pub(crate) struct TyrDrmDeviceData {
>      pub(crate) gpu_info: GpuInfo,
>  }
> 
> -fn issue_soft_reset(dev: &Device<Bound>, iomem: &IoMem) -> Result {
> +fn issue_soft_reset(dev: &Device<Bound>, iomem: &IoMem<'_>) -> Result {
>      regs::GPU_CMD.write(iomem, regs::GPU_CMD_SOFT_RESET);
> 
>      poll::read_poll_timeout(
> @@ -133,8 +137,10 @@ fn probe(
>                  gpu_info,
>          });
> 
> +        let reg_data = RegData { iomem };
> +
>          let tdev = drm::UnregisteredDevice::<TyrDrmDriver>::new(pdev, data)?;
> -        let tdev = drm::driver::Registration::new_foreign_owned(tdev, pdev.as_ref(), (), 0)?;
> +        let tdev = drm::driver::Registration::new_foreign_owned(tdev, pdev.as_ref(), reg_data, 0)?;
> 
>          let driver = TyrPlatformDriverData {
>              _device: tdev.into(),
> @@ -176,7 +182,7 @@ fn drop(self: Pin<&mut Self>) {
>  #[vtable]
>  impl drm::Driver for TyrDrmDriver {
>      type Data = TyrDrmDeviceData;
> -    type RegistrationData = ForLt!(());
> +    type RegistrationData = ForLt!(for<'a> RegData<'a>);
>      type File = TyrDrmFileData;
>      type Object<R: drm::DeviceContext> = drm::gem::Object<TyrObject, R>;
>      type ParentDevice<Ctx: DeviceContext> = platform::Device<Ctx>;
> diff --git a/drivers/gpu/drm/tyr/file.rs b/drivers/gpu/drm/tyr/file.rs
> index 9f53da7633ab..30efdf924cc2 100644
> --- a/drivers/gpu/drm/tyr/file.rs
> +++ b/drivers/gpu/drm/tyr/file.rs
> @@ -10,6 +10,7 @@
>  };
> 
>  use crate::driver::{
> +    RegData,
>      TyrDrmDevice,
>      TyrDrmDriver, //
>  };
> @@ -32,10 +33,12 @@ impl TyrDrmFileData {
>      pub(crate) fn dev_query(
>          ddev: &TyrDrmDevice,
>          _pdev: &platform::Device<device::Bound>,
> -        _reg_data: &(),
> +        reg_data: &RegData<'_>,
>          devquery: &mut uapi::drm_panthor_dev_query,
>          _file: &TyrDrmFile,
>      ) -> Result<u32> {
> +        let _iomem = reg_data.iomem;
> +
>          if devquery.pointer == 0 {
>              match devquery.type_ {
>                  uapi::drm_panthor_dev_query_type_DRM_PANTHOR_DEV_QUERY_GPU_INFO => {
> diff --git a/drivers/gpu/drm/tyr/gpu.rs b/drivers/gpu/drm/tyr/gpu.rs
> index bb0473c85bf7..f169fb1ccc03 100644
> --- a/drivers/gpu/drm/tyr/gpu.rs
> +++ b/drivers/gpu/drm/tyr/gpu.rs
> @@ -34,7 +34,7 @@
>  pub(crate) struct GpuInfo(pub(crate) uapi::drm_panthor_gpu_info);
> 
>  impl GpuInfo {
> -    pub(crate) fn new(iomem: &IoMem) -> Self {
> +    pub(crate) fn new(iomem: &IoMem<'_>) -> Self {
>          let gpu_id = regs::GPU_ID.read(iomem);
>          let csf_id = regs::GPU_CSF_ID.read(iomem);
>          let gpu_rev = regs::GPU_REVID.read(iomem);
> @@ -206,7 +206,7 @@ fn from(value: u32) -> Self {
>  }
> 
>  /// Powers on the l2 block.
> -pub(crate) fn l2_power_on(dev: &Device<Bound>, iomem: &IoMem) -> Result {
> +pub(crate) fn l2_power_on(dev: &Device<Bound>, iomem: &IoMem<'_>) -> Result {
>      regs::L2_PWRON_LO.write(iomem, 1);
> 
>      poll::read_poll_timeout(
> diff --git a/drivers/gpu/drm/tyr/regs.rs b/drivers/gpu/drm/tyr/regs.rs
> index 0881b3812afd..2b0da6019512 100644
> --- a/drivers/gpu/drm/tyr/regs.rs
> +++ b/drivers/gpu/drm/tyr/regs.rs
> @@ -20,12 +20,12 @@
> 
>  impl<const OFFSET: usize> Register<OFFSET> {
>      #[inline]
> -    pub(crate) fn read(&self, iomem: &IoMem) -> u32 {
> +    pub(crate) fn read(&self, iomem: &IoMem<'_>) -> u32 {
>          iomem.read32(OFFSET)
>      }
> 
>      #[inline]
> -    pub(crate) fn write(&self, iomem: &IoMem, value: u32) {
> +    pub(crate) fn write(&self, iomem: &IoMem<'_>, value: u32) {
>          iomem.write32(value, OFFSET);
>      }
>  }