[PATCH 1/2] rust: pci: document Bar's endianness conversion

[PATCH 1/2] rust: pci: document Bar's endianness conversion

[Marko Turk]

Document that the Bar's MMIO backend always assumes little-endian
devices and that its operations automatically convert to CPU endianness.

Signed-off-by: Marko Turk <mt@markoturk.info>
Link: https://lore.kernel.org/lkml/DE7F6RR1NAKW.3DJYO44O73941@kernel.org/
---
 rust/kernel/pci/io.rs | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/rust/kernel/pci/io.rs b/rust/kernel/pci/io.rs
index 0d55c3139b6f..bfa9df9e9bb9 100644
--- a/rust/kernel/pci/io.rs
+++ b/rust/kernel/pci/io.rs
@@ -18,9 +18,12 @@
 
 /// A PCI BAR to perform I/O-Operations on.
 ///
+/// I/O backend assumes that the device is little-endian and will automatically
+/// convert from little-endian to CPU endianness.
+///
 /// # Invariants
 ///
-/// `Bar` always holds an `IoRaw` inststance that holds a valid pointer to the start of the I/O
+/// `Bar` always holds an `IoRaw` instance that holds a valid pointer to the start of the I/O
 /// memory mapped PCI BAR and its size.
 pub struct Bar<const SIZE: usize = 0> {
     pdev: ARef<Device>,
-- 
2.51.0

[PATCH 2/2] samples: rust: fix endianness issue in rust_driver_pci

[Marko Turk]

MMIO backend of PCI Bar always assumes little-endian devices and
will convert to CPU endianness automatically. Remove the u32::from_le
conversion which would cause a bug on big-endian machines.

Signed-off-by: Marko Turk <mt@markoturk.info>
Fixes: 685376d18e9a ("samples: rust: add Rust PCI sample driver")
---
 samples/rust/rust_driver_pci.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci.rs
index 5823787bea8e..fa677991a5c4 100644
--- a/samples/rust/rust_driver_pci.rs
+++ b/samples/rust/rust_driver_pci.rs
@@ -48,7 +48,7 @@ fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> {
         // Select the test.
         bar.write8(index.0, Regs::TEST);
 
-        let offset = u32::from_le(bar.read32(Regs::OFFSET)) as usize;
+        let offset = bar.read32(Regs::OFFSET) as usize;
         let data = bar.read8(Regs::DATA);
 
         // Write `data` to `offset` to increase `count` by one.
-- 
2.51.0

Re: [PATCH 2/2] samples: rust: fix endianness issue in rust_driver_pci

[Dirk Behme]

On 10.12.25 12:25, Marko Turk wrote:
> MMIO backend of PCI Bar always assumes little-endian devices and
> will convert to CPU endianness automatically. Remove the u32::from_le
> conversion which would cause a bug on big-endian machines.
> 
> Signed-off-by: Marko Turk <mt@markoturk.info>
> Fixes: 685376d18e9a ("samples: rust: add Rust PCI sample driver")
> ---
>  samples/rust/rust_driver_pci.rs | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/samples/rust/rust_driver_pci.rs b/samples/rust/rust_driver_pci.rs
> index 5823787bea8e..fa677991a5c4 100644
> --- a/samples/rust/rust_driver_pci.rs
> +++ b/samples/rust/rust_driver_pci.rs
> @@ -48,7 +48,7 @@ fn testdev(index: &TestIndex, bar: &Bar0) -> Result<u32> {
>          // Select the test.
>          bar.write8(index.0, Regs::TEST);
>  
> -        let offset = u32::from_le(bar.read32(Regs::OFFSET)) as usize;
> +        let offset = bar.read32(Regs::OFFSET) as usize;

Yes, dropping from_le() is what we talked about:

Reviewed-by: Dirk Behme <dirk.behme@de.bosch.com>

Thanks

Dirk

P.S.: I'm not sure if the `Fixes` is required: As far as I understood
there are no big-endian machines supported by Rust, yet. On all other
supported little-endian machines this is a no-op. So I think it is at
least debatable if this is a "bug" which needs back porting.