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* [GIT PULL] RISC-V Sophgo Devicetrees for v6.19
@ 2025-11-19  7:24 Chen Wang
  2025-11-21 20:21 ` patchwork-bot+linux-soc
  2025-12-01 12:36 ` Chen Wang
  0 siblings, 2 replies; 3+ messages in thread
From: Chen Wang @ 2025-11-19  7:24 UTC (permalink / raw)
  To: soc, Arnd Bergmann
  Cc: Conor Dooley, Inochi Amaoto, sophgo@lists.linux.dev, linux-riscv,
	Chen Wang, Zixian Zeng, Longbin Li

Hey Arnd,

Please pull this dt changes for RISC-V/Sophgo.

Thanks,

Chen

The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787:

   Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)

are available in the Git repository at:

   https://github.com/sophgo/linux.git tags/riscv-sophgo-dt-for-v6.19

for you to fetch changes up to af5eb17ff893bf6e52680a31059e1816749c2d20:

   riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2 (2025-11-18 
09:17:55 +0800)

----------------------------------------------------------------
RISC-V Devicetrees for v6.19

Sophgo:

For CV18xx serials:
Add top syscon device related DTS change, the top system
controller provides register access to configure some
misc modules, such as usb2 phy and a dma multiplexer.

For SG2042:
There are two changes. The first one is to add DTS
definition for PCIe controllers for SoC SG2042 and
boards such as Pioneerbox/EVB_V1/EVB_V2 uses SG2042.
The second one is to add DTS to support SPI-NOR flash
controllers for this SoC and the same for related boards.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

----------------------------------------------------------------
Chen Wang (4):
       riscv: sophgo: dts: add PCIe controllers for SG2042
       riscv: sophgo: dts: enable PCIe for PioneerBox
       riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
       riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0

Longbin Li (3):
       dt-bindings: soc: sophgo: add TOP syscon for CV18XX/SG200X series SoC
       riscv: dts: sophgo: Add syscon node for cv18xx
       riscv: dts: sophgo: Add USB support for cv18xx

Zixian Zeng (4):
       riscv: dts: sophgo: Add SPI NOR node for SG2042
       riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
       riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
       riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2

  .../soc/sophgo/sophgo,cv1800b-top-syscon.yaml      |  80 +++++++++++++++
  arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts   |   5 +
  arch/riscv/boot/dts/sophgo/cv180x.dtsi             |  42 ++++++++
  arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts  |   5 +
  .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     |   5 +
  arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts       |  36 +++++++
  arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts       |  24 +++++
  .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts |  36 +++++++
  arch/riscv/boot/dts/sophgo/sg2042.dtsi             | 112 
+++++++++++++++++++++
  9 files changed, 345 insertions(+)
  create mode 100644 
Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-top-syscon.yaml


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [GIT PULL] RISC-V Sophgo Devicetrees for v6.19
  2025-11-19  7:24 [GIT PULL] RISC-V Sophgo Devicetrees for v6.19 Chen Wang
@ 2025-11-21 20:21 ` patchwork-bot+linux-soc
  2025-12-01 12:36 ` Chen Wang
  1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+linux-soc @ 2025-11-21 20:21 UTC (permalink / raw)
  To: Chen Wang; +Cc: soc

Hello:

This pull request was applied to soc/soc.git (for-next)
by Arnd Bergmann <arnd@arndb.de>:

On Wed, 19 Nov 2025 15:24:20 +0800 you wrote:
> Hey Arnd,
> 
> Please pull this dt changes for RISC-V/Sophgo.
> 
> Thanks,
> 
> Chen
> 
> [...]

Here is the summary with links:
  - [GIT,PULL] RISC-V Sophgo Devicetrees for v6.19
    https://git.kernel.org/soc/soc/c/314bfe59ec2a

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [GIT PULL] RISC-V Sophgo Devicetrees for v6.19
  2025-11-19  7:24 [GIT PULL] RISC-V Sophgo Devicetrees for v6.19 Chen Wang
  2025-11-21 20:21 ` patchwork-bot+linux-soc
@ 2025-12-01 12:36 ` Chen Wang
  1 sibling, 0 replies; 3+ messages in thread
From: Chen Wang @ 2025-12-01 12:36 UTC (permalink / raw)
  To: soc, Arnd Bergmann
  Cc: Conor Dooley, Inochi Amaoto, sophgo@lists.linux.dev, linux-riscv,
	Zixian Zeng, Longbin Li

Hello, Arnd,

Have you picked this PR yet? I see the merge window for v6.19 has opened 
this week, but I haven't received your email confirming your applying. 
So I'm pinging you.

If you've already picked it, please just ignore this ping email.

Kind regards,

Chen


On 11/19/2025 3:24 PM, Chen Wang wrote:
> Hey Arnd,
>
> Please pull this dt changes for RISC-V/Sophgo.
>
> Thanks,
>
> Chen
>
> The following changes since commit 
> 3a8660878839faadb4f1a6dd72c3179c1df56787:
>
>   Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)
>
> are available in the Git repository at:
>
>   https://github.com/sophgo/linux.git tags/riscv-sophgo-dt-for-v6.19
>
> for you to fetch changes up to af5eb17ff893bf6e52680a31059e1816749c2d20:
>
>   riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2 
> (2025-11-18 09:17:55 +0800)
>
> ----------------------------------------------------------------
> RISC-V Devicetrees for v6.19
>
> Sophgo:
>
> For CV18xx serials:
> Add top syscon device related DTS change, the top system
> controller provides register access to configure some
> misc modules, such as usb2 phy and a dma multiplexer.
>
> For SG2042:
> There are two changes. The first one is to add DTS
> definition for PCIe controllers for SoC SG2042 and
> boards such as Pioneerbox/EVB_V1/EVB_V2 uses SG2042.
> The second one is to add DTS to support SPI-NOR flash
> controllers for this SoC and the same for related boards.
>
> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
>
> ----------------------------------------------------------------
> Chen Wang (4):
>       riscv: sophgo: dts: add PCIe controllers for SG2042
>       riscv: sophgo: dts: enable PCIe for PioneerBox
>       riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
>       riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
>
> Longbin Li (3):
>       dt-bindings: soc: sophgo: add TOP syscon for CV18XX/SG200X 
> series SoC
>       riscv: dts: sophgo: Add syscon node for cv18xx
>       riscv: dts: sophgo: Add USB support for cv18xx
>
> Zixian Zeng (4):
>       riscv: dts: sophgo: Add SPI NOR node for SG2042
>       riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
>       riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
>       riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2
>
>  .../soc/sophgo/sophgo,cv1800b-top-syscon.yaml      |  80 +++++++++++++++
>  arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts   |   5 +
>  arch/riscv/boot/dts/sophgo/cv180x.dtsi             |  42 ++++++++
>  arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts  |   5 +
>  .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     |   5 +
>  arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts       |  36 +++++++
>  arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts       |  24 +++++
>  .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts |  36 +++++++
>  arch/riscv/boot/dts/sophgo/sg2042.dtsi             | 112 
> +++++++++++++++++++++
>  9 files changed, 345 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-top-syscon.yaml
>

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2025-11-19  7:24 [GIT PULL] RISC-V Sophgo Devicetrees for v6.19 Chen Wang
2025-11-21 20:21 ` patchwork-bot+linux-soc
2025-12-01 12:36 ` Chen Wang

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