From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11FADC07E8E for ; Wed, 24 Apr 2024 16:55:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id D772CC4AF08; Wed, 24 Apr 2024 16:55:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DD803C2BD10; Wed, 24 Apr 2024 16:55:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1713977752; bh=RArGbTjywJoapBjOn9e2Rdum0BFmx8tdgHzlyAoGPLY=; h=Date:From:To:List-Id:Cc:Subject:In-Reply-To:References:From; b=feJRYweRIJNAtCLDEBPRIx3Mo5wBq2K4oJepu0wNdVpoJJBfmjeIA2mbOGsy1H7gG GMkx0jQZWBpv6G/kJLJDhXNJP8FXU6hJB9KoNFBUlm++wnD53gGjJSArlMtfIiHdx2 /74sfrJ/snFjnz2ENHf+pXK/+kvgBfMjlWr6HbVnDf+7+jB73/t+yTa49yEFYUHT+R 9PmWT57QCCEQi5D4V25zkXhHzDATNpg8NXNV9Ch3rR+9B8lEykVxPdLg1nGS0x6lEn LdhBoxyhTVfyXv1hnZO7H05WtMTppgIUTtHNyX4K+QpY+JxkVTDPqgQcvNvV/wbr8r 8w0d31RQuJxSg== Date: Wed, 24 Apr 2024 18:55:47 +0200 From: Marek =?UTF-8?B?QmVow7pu?= To: Andy Shevchenko List-Id: Cc: Gregory CLEMENT , Arnd Bergmann , soc@kernel.org, Olivia Mackall , Herbert Xu , Greg Kroah-Hartman , linux-crypto@vger.kernel.org, arm@kernel.org Subject: Re: [PATCH v6 07/11] platform: cznic: turris-omnia-mcu: Add support for MCU provided TRNG Message-ID: <20240424185547.4cf20408@dellmb> In-Reply-To: References: <20240418121116.22184-1-kabel@kernel.org> <20240418121116.22184-8-kabel@kernel.org> <20240423183225.6e4f90a7@thinkpad> <20240423185704.2237bc65@thinkpad> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.41; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Tue, 23 Apr 2024 20:25:14 +0300 Andy Shevchenko wrote: > On Tue, Apr 23, 2024 at 06:57:04PM +0200, Marek Beh=C3=BAn wrote: > > On Tue, 23 Apr 2024 19:43:41 +0300 > > Andy Shevchenko wrote: =20 > > > On Tue, Apr 23, 2024 at 7:32=E2=80=AFPM Marek Beh=C3=BAn wrote: =20 > > > > On Tue, 23 Apr 2024 18:58:19 +0300 > > > > Andy Shevchenko wrote: =20 > > > > > On Thu, Apr 18, 2024 at 02:11:12PM +0200, Marek Beh=C3=BAn wrote:= =20 >=20 > ... >=20 > > > > > > + irq_idx =3D omnia_int_to_gpio_idx[__bf_shf(INT_TRNG)]; > > > > > > + irq =3D devm_irq_create_mapping(dev, mcu->gc.irq.domain, ir= q_idx); > > > > > > + if (irq < 0) > > > > > > + return dev_err_probe(dev, irq, "Cannot map TRNG IRQ= \n"); =20 > > > > > > > > > > This looks like some workaround against existing gpiod_to_irq(). = Why do you > > > > > need this? =20 > > > > > > > > Hmmm, I thought that would not work because that line is only valid > > > > as an IRQ, not as a GPIO (this is enforced via the valid_mask membe= r of > > > > gpio_chip and gpio_irq_chip). > > > > > > > > But looking at the code of gpiolib, if I do > > > > irq =3D gpiod_to_irq(gpiochip_get_desc(gc, irq_idx)); > > > > the valid_mask is not enforced anywhere. =20 > > >=20 > > > Which one? GPIO has two: one per GPIO realm and one for IRQ domain. = =20 > >=20 > > The GPIO line validity is not enforced. The IRQ line validity is > > enforced in the gpiochip_to_irq() method. =20 >=20 > Okay, but does it work for you as expected then? >=20 > If not, we should fix GPIO library to have gpiod_to_irq() to work as expe= cted. Yes, it does. I am going to send a new version in a few minutes. Marek