From: "Marek Behún" <kabel@kernel.org>
To: "Andrew Lunn" <andrew@lunn.ch>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Arnd Bergmann" <arnd@arndb.de>,
soc@kernel.org, linux-arm-kernel@lists.infradead.org,
arm@kernel.org, "Andy Shevchenko" <andy@kernel.org>,
"Hans de Goede" <hdegoede@redhat.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: "Marek Behún" <kabel@kernel.org>
Subject: [PATCH v3 5/5] irqchip/armada-370-xp: Use atomic_io_modify() instead of another spinlock
Date: Fri, 21 Jun 2024 11:38:32 +0200 [thread overview]
Message-ID: <20240621093832.23319-6-kabel@kernel.org> (raw)
In-Reply-To: <20240621093832.23319-1-kabel@kernel.org>
Use the dedicated atomic_io_modify() instead of hardcoded
spin_lock() + readl() + writel() + spin_unlock() sequence.
This allows us to drop the irq_controller_lock spinlock from the driver.
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/irqchip/irq-armada-370-xp.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index ada257aeba78..dce2b80bf439 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -512,24 +512,18 @@ static __init void armada_xp_ipi_init(struct device_node *node)
set_smp_ipi_range(base_ipi, IPI_DOORBELL_END);
}
-static DEFINE_RAW_SPINLOCK(irq_controller_lock);
-
static int armada_xp_set_affinity(struct irq_data *d,
const struct cpumask *mask_val, bool force)
{
irq_hw_number_t hwirq = irqd_to_hwirq(d);
- unsigned long reg, mask;
int cpu;
/* Select a single core from the affinity mask which is online */
cpu = cpumask_any_and(mask_val, cpu_online_mask);
- mask = 1UL << cpu_logical_map(cpu);
- raw_spin_lock(&irq_controller_lock);
- reg = readl(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
- reg = (reg & (~ARMADA_370_XP_INT_SOURCE_CPU_MASK)) | mask;
- writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
- raw_spin_unlock(&irq_controller_lock);
+ atomic_io_modify(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq),
+ ARMADA_370_XP_INT_SOURCE_CPU_MASK,
+ BIT(cpu_logical_map(cpu)));
irq_data_update_effective_affinity(d, cpumask_of(cpu));
--
2.44.2
next prev parent reply other threads:[~2024-06-21 9:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-21 9:38 [PATCH v3 0/5] armada-370-xp irqchip updates Marek Behún
2024-06-21 9:38 ` [PATCH v3 1/5] irqchip/armada-370-xp: Do not allow mapping IRQ 0 and 1 Marek Behún
2024-06-21 9:38 ` [PATCH v3 2/5] irqchip/armada-370-xp: Only call ipi_resume() if IPI is available Marek Behún
2024-06-21 9:38 ` [PATCH v3 3/5] irqchip/armada-370-xp: Do not touch IPI registers on platforms without IPI Marek Behún
2024-06-21 9:38 ` [PATCH v3 4/5] irqchip/armada-370-xp: Add support for 32 MSI interrupts on non-IPI platforms Marek Behún
2024-06-21 9:38 ` Marek Behún [this message]
2024-07-01 17:00 ` [PATCH v3 0/5] armada-370-xp irqchip updates Marek Behún
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