From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sg-1-31.ptr.blmpb.com (sg-1-31.ptr.blmpb.com [118.26.132.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43B3F145B27 for ; Tue, 8 Jul 2025 03:21:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=118.26.132.31 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751944890; cv=none; b=J3Vhowfqpve+DYc+LvvikngJKJ/UPkmmc+ZJhMuR/dZ1XJGba9F2lrDONASP6DFX3/OmNH50iu5B8ePz9asUhqgtwYN08i1T2qh+H/4TpZN27ThSuTUoH4kcbhibjYv1YxRiY9pdGMLBCWasSCoYg9cGviTEfvWu84MPct442h4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751944890; c=relaxed/simple; bh=bzHv4eU31X/RdPTqcUe73N6UHOSb98BHHaw0WjDXxpg=; h=In-Reply-To:Date:Mime-Version:Subject:Message-Id:Content-Type:To: Cc:References:From; b=IOK7vndoHtSgGowgbXO72+D1JTMKC3urGGiHBN5rpluPZe19M6yZAig01BtrSSE+Gp0Cp4ca0QHAKskFmz6P5RhKDZxBd3bP93kXoa/m1FDS0y088sEkqilkYegCpxg1nTXXqgo8OoA9YqfGG4aznpQz9Gatk7uMNJ/t1Qa+Jls= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=lanxincomputing.com; spf=pass smtp.mailfrom=lanxincomputing.com; dkim=pass (2048-bit key) header.d=lanxincomputing-com.20200927.dkim.feishu.cn header.i=@lanxincomputing-com.20200927.dkim.feishu.cn header.b=0XFtq1rI; arc=none smtp.client-ip=118.26.132.31 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=lanxincomputing.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lanxincomputing.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=lanxincomputing-com.20200927.dkim.feishu.cn header.i=@lanxincomputing-com.20200927.dkim.feishu.cn header.b="0XFtq1rI" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=s1; d=lanxincomputing-com.20200927.dkim.feishu.cn; t=1751944882; h=from:subject:mime-version:from:date:message-id:subject:to:cc: reply-to:content-type:mime-version:in-reply-to:message-id; bh=zg/YomFgWluXbABhhcO8ioOh4E5v2C7pZz7d5544dM4=; b=0XFtq1rI2Q6dFJwemZvO8QeXnbU32xXFv6jDcy/HA7WN8LrPqfRr/5VgvayB9MVCwBTMXU VJj6fRqLFra308eGJDZ4M09d20AFxzEtarTuQ7rE51jfY9g5egF8QXeNVtd9U+rxIGL8Fy hVVzkmv+4ZArOPqEobdrPgRiLVEF+dyFvzM6+QHDTaXGQG7Cq3sqwQ0VzFu1PUzpEQxUyB kk5iFmg/t46oZzorFzJnhG67UFUi3c/W09p6CSvQHbCGEuFQJAW1okA7UfDGUcPPWQNC3Q zll79zrgR83ICAtQ6IxXvLBFF2i6PzAgrIkYTGjPQ1hEx7SkNUhwD+d3QX+jOg== Content-Transfer-Encoding: 7bit In-Reply-To: User-Agent: Mozilla Thunderbird Date: Tue, 8 Jul 2025 11:21:16 +0800 Precedence: bulk X-Mailing-List: sophgo@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Subject: Re: [PATCH v3 3/3] riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree Message-Id: Content-Type: text/plain; charset=UTF-8 X-Lms-Return-Path: Received: from [127.0.0.1] ([116.237.111.137]) by smtp.feishu.cn with ESMTPS; Tue, 08 Jul 2025 11:21:19 +0800 To: "Han Gao" , Cc: "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Paul Walmsley" , "Palmer Dabbelt" , "Albert Ou" , "Alexandre Ghiti" , "Chen Wang" , "Inochi Amaoto" , "Thomas Bonnefille" , "Guo Ren" , "Chao Wei" , , , Content-Language: en-US References: From: "Nutty Liu" X-Original-From: Nutty Liu On 7/5/2025 3:39 PM, Han Gao wrote: > Sophgo SG2042_EVB_V2.0 [1] is a prototype development board based on SG2042 > > Currently supports serial port, sdcard/emmc, pwm, fan speed control. > > Link: https://github.com/sophgo/sophgo-hardware/tree/master/SG2042/SG2042-x4-EVB [1] > > Signed-off-by: Han Gao Reviewed-by: Nutty Liu Thanks, Nutty > --- > arch/riscv/boot/dts/sophgo/Makefile | 1 + > arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 233 +++++++++++++++++++ > 2 files changed, 234 insertions(+) > create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts > > diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile > index 6c9b29681cad..6f65526d4193 100644 > --- a/arch/riscv/boot/dts/sophgo/Makefile > +++ b/arch/riscv/boot/dts/sophgo/Makefile > @@ -4,4 +4,5 @@ dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb > dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb > dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb > dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v1.dtb > +dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v2.dtb > dtb-$(CONFIG_ARCH_SOPHGO) += sg2044-sophgo-srd3-10.dtb > diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts > new file mode 100644 > index 000000000000..46980e41b886 > --- /dev/null > +++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts > @@ -0,0 +1,233 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2025 Sophgo Technology Inc. All rights reserved. > + */ > + > +#include "sg2042.dtsi" > + > +#include > +#include > + > +/ { > + model = "Sophgo SG2042 EVB V2.0"; > + compatible = "sophgo,sg2042-evb-v2", "sophgo,sg2042"; > + > + chosen { > + stdout-path = "serial0"; > + }; > + > + pwmfan: pwm-fan { > + compatible = "pwm-fan"; > + cooling-levels = <103 128 179 230 255>; > + pwms = <&pwm 0 40000 0>; > + #cooling-cells = <2>; > + }; > + > + thermal-zones { > + soc-thermal { > + polling-delay-passive = <1000>; > + polling-delay = <1000>; > + thermal-sensors = <&mcu 0>; > + > + trips { > + soc_active1: soc-active1 { > + temperature = <30000>; > + hysteresis = <8000>; > + type = "active"; > + }; > + > + soc_active2: soc-active2 { > + temperature = <58000>; > + hysteresis = <12000>; > + type = "active"; > + }; > + > + soc_active3: soc-active3 { > + temperature = <70000>; > + hysteresis = <10000>; > + type = "active"; > + }; > + > + soc_hot: soc-hot { > + temperature = <80000>; > + hysteresis = <5000>; > + type = "hot"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip = <&soc_active1>; > + cooling-device = <&pwmfan 0 1>; > + }; > + > + map1 { > + trip = <&soc_active2>; > + cooling-device = <&pwmfan 1 2>; > + }; > + > + map2 { > + trip = <&soc_active3>; > + cooling-device = <&pwmfan 2 3>; > + }; > + > + map3 { > + trip = <&soc_hot>; > + cooling-device = <&pwmfan 3 4>; > + }; > + }; > + }; > + > + board-thermal { > + polling-delay-passive = <1000>; > + polling-delay = <1000>; > + thermal-sensors = <&mcu 1>; > + > + trips { > + board_active: board-active { > + temperature = <75000>; > + hysteresis = <8000>; > + type = "active"; > + }; > + }; > + > + cooling-maps { > + map4 { > + trip = <&board_active>; > + cooling-device = <&pwmfan 3 4>; > + }; > + }; > + }; > + }; > +}; > + > +&cgi_main { > + clock-frequency = <25000000>; > +}; > + > +&cgi_dpll0 { > + clock-frequency = <25000000>; > +}; > + > +&cgi_dpll1 { > + clock-frequency = <25000000>; > +}; > + > +&emmc { > + pinctrl-0 = <&emmc_cfg>; > + pinctrl-names = "default"; > + bus-width = <4>; > + no-sdio; > + no-sd; > + non-removable; > + wp-inverted; > + status = "okay"; > +}; > + > +&i2c1 { > + pinctrl-0 = <&i2c1_cfg>; > + pinctrl-names = "default"; > + status = "okay"; > + > + mcu: syscon@17 { > + compatible = "sophgo,sg2042-hwmon-mcu"; > + reg = <0x17>; > + #thermal-sensor-cells = <1>; > + }; > +}; > + > +&gmac0 { > + phy-handle = <&phy0>; > + phy-mode = "rgmii-id"; > + status = "okay"; > + > + mdio { > + phy0: phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0>; > + reset-gpios = <&port0a 27 GPIO_ACTIVE_LOW>; > + reset-assert-us = <100000>; > + reset-deassert-us = <100000>; > + }; > + }; > +}; > + > +&pinctrl { > + emmc_cfg: sdhci-emmc-cfg { > + sdhci-emmc-wp-pins { > + pinmux = ; > + bias-disable; > + drive-strength-microamp = <26800>; > + input-schmitt-disable; > + }; > + > + sdhci-emmc-cd-pins { > + pinmux = ; > + bias-pull-up; > + drive-strength-microamp = <26800>; > + input-schmitt-enable; > + }; > + > + sdhci-emmc-rst-pwr-pins { > + pinmux = , > + ; > + bias-disable; > + drive-strength-microamp = <26800>; > + input-schmitt-disable; > + }; > + }; > + > + i2c1_cfg: i2c1-cfg { > + i2c1-pins { > + pinmux = , > + ; > + bias-pull-up; > + drive-strength-microamp = <26800>; > + input-schmitt-enable; > + }; > + }; > + > + sd_cfg: sdhci-sd-cfg { > + sdhci-sd-cd-wp-pins { > + pinmux = , > + ; > + bias-pull-up; > + drive-strength-microamp = <26800>; > + input-schmitt-enable; > + }; > + > + sdhci-sd-rst-pwr-pins { > + pinmux = , > + ; > + bias-disable; > + drive-strength-microamp = <26800>; > + input-schmitt-disable; > + }; > + }; > + > + uart0_cfg: uart0-cfg { > + uart0-rx-pins { > + pinmux = , > + ; > + bias-pull-up; > + drive-strength-microamp = <26800>; > + input-schmitt-enable; > + }; > + }; > +}; > + > +&sd { > + pinctrl-0 = <&sd_cfg>; > + pinctrl-names = "default"; > + bus-width = <4>; > + no-sdio; > + no-mmc; > + wp-inverted; > + status = "okay"; > +}; > + > +&uart0 { > + pinctrl-0 = <&uart0_cfg>; > + pinctrl-names = "default"; > + status = "okay"; > +};