From: Alex Elder <elder@riscstar.com>
To: dlan@gentoo.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org
Cc: ziyao@disroot.org, aurelien@aurel32.net, johannes@erdfelt.com,
mayank.rana@oss.qualcomm.com, qiang.yu@oss.qualcomm.com,
shradha.t@samsung.com, inochiama@gmail.com, pjw@kernel.org,
palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
p.zabel@pengutronix.de, christian.bruel@foss.st.com,
thippeswamy.havalige@amd.com, krishna.chundru@oss.qualcomm.com,
guodong@riscstar.com, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, linux-phy@lists.infradead.org,
spacemit@lists.linux.dev, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v6 0/7] Introduce SpacemiT K1 PCIe phy and host controller
Date: Thu, 13 Nov 2025 15:45:32 -0600 [thread overview]
Message-ID: <20251113214540.2623070-1-elder@riscstar.com> (raw)
This series introduces a PHY driver and a PCIe driver to support PCIe
on the SpacemiT K1 SoC. The PCIe implementation is derived from a
Synopsys DesignWare PCIe IP. The PHY driver supports one combination
PCIe/USB PHY as well as two PCIe-only PHYs. The combo PHY port uses
one PCIe lane, and the other two ports each have two lanes. All PCIe
ports operate at 5 GT/second.
The PCIe PHYs must be configured using a value that can only be
determined using the combo PHY, operating in PCIe mode. To allow
that PHY to be used for USB, the needed calibration step is performed
by the PHY driver automatically at probe time. Once this step is done,
the PHY can be used for either PCIe or USB.
The driver supports 256 MSIs, and initially does not support PCI INTx
interrupts. The hardware does not support MSI-X.
Version 6 of this series addresses a few comments from Christophe
Jaillet, and improves a workaround that disables ASPM L1. The two
people who had reported errors on earlier versions of this code have
confirmed their NVMe devices now work when configured with the default
RISC-V kernel configuration.
-Alex
This series is available here:
https://github.com/riscstar/linux/tree/outgoing/pcie-v6
Between version 5 and version 6:
- Aurelien Jarno and Johannes Erdfelt tested this code and found
they no longer saw the errors they observed previously
- Disabling ASPM L1 is now done earlier, at the end of the
dw_pcie_host_ops->init callback rather than ->post_init
- The function that disables ASPM L1 has been moved and renamed
- The return value from devm_platform_ioremap_resource_byname()
is now checked with IS_ERR()
- The number of MSI vectors implemented is back to 256, after
confirming with SpacemiT that they are all in fact supported
- The sentinel entry in the OF match table no longer includes
a trailing comma
- MODULE_LICENSE() and MODULE_DESCRIPTION() macros are now
included
Here is version 5 of this series:
https://lore.kernel.org/lkml/20251107191557.1827677-1-elder@riscstar.com/
Between version 4 and version 5:
- Clarify that INTx interrupts are not currently supported
- Add Rob Herring's Reviewed-by on patch 3
- The name of the PCIe root port will always begin with "pcie"
- Lines in the bindings are now wrapped at 80 columns
- Subject lines are all captialized (after subsystem tags)
- Place the PCIe Kconfig option in the proper location based on
vendor name (not Kconfig symbol); expand its description
- Drop two PCIe controller Kconfig dependencies
- Use dw_pcie_readl_dbi() and dw_pcie_writel_dbi() when turning
off ASPM L1
- The dw_pcie_host_ops->init callback has been rearranged a bit:
- The vendor and device IDs are now set early
- PERST# is asserted separate from putting the controller in RC mode
and indicating power is detected
- phy_init() is now called later, just before deasserting PERST#
- Because of timing issues involved in having the root port enable power,
getting and enabling the regulator is back to being done in the PCIe
controller probe function
- The regulator definition is moved back to the PCIe controller DT node,
out of the root port sub-node (in "k1-bananapi-f3.dts")
Here is version 4 of this series:
https://lore.kernel.org/lkml/20251030220259.1063792-1-elder@riscstar.com/
Additional history is available at that link.
Alex Elder (7):
dt-bindings: phy: spacemit: Add SpacemiT PCIe/combo PHY
dt-bindings: phy: spacemit: Introduce PCIe PHY
dt-bindings: pci: spacemit: Introduce PCIe host controller
phy: spacemit: Introduce PCIe/combo PHY
PCI: spacemit: Add SpacemiT PCIe host driver
riscv: dts: spacemit: Add a PCIe regulator
riscv: dts: spacemit: PCIe and PHY-related updates
.../bindings/pci/spacemit,k1-pcie-host.yaml | 157 ++++
.../bindings/phy/spacemit,k1-combo-phy.yaml | 114 +++
.../bindings/phy/spacemit,k1-pcie-phy.yaml | 71 ++
.../boot/dts/spacemit/k1-bananapi-f3.dts | 44 ++
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 33 +
arch/riscv/boot/dts/spacemit/k1.dtsi | 176 +++++
drivers/pci/controller/dwc/Kconfig | 13 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-spacemit-k1.c | 358 ++++++++++
drivers/phy/Kconfig | 11 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-spacemit-k1-pcie.c | 670 ++++++++++++++++++
12 files changed, 1649 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml
create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml
create mode 100644 Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-spacemit-k1.c
create mode 100644 drivers/phy/phy-spacemit-k1-pcie.c
base-commit: 6d7e7251d03f98f26f2ee0dfd21bb0a0480a2178
--
2.48.1
next reply other threads:[~2025-11-13 21:45 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-13 21:45 Alex Elder [this message]
2025-11-13 21:45 ` [PATCH v6 1/7] dt-bindings: phy: spacemit: Add SpacemiT PCIe/combo PHY Alex Elder
2025-11-13 21:45 ` [PATCH v6 2/7] dt-bindings: phy: spacemit: Introduce PCIe PHY Alex Elder
2025-11-13 21:45 ` [PATCH v6 3/7] dt-bindings: pci: spacemit: Introduce PCIe host controller Alex Elder
2025-11-13 21:45 ` [PATCH v6 4/7] phy: spacemit: Introduce PCIe/combo PHY Alex Elder
2025-11-18 8:56 ` Neil Armstrong
2025-11-18 14:11 ` Alex Elder
2025-12-01 13:49 ` Alex Elder
2025-11-13 21:45 ` [PATCH v6 5/7] PCI: spacemit: Add SpacemiT PCIe host driver Alex Elder
2025-11-17 13:01 ` Vitor Soares
2025-11-17 13:17 ` Manivannan Sadhasivam
2025-11-13 21:45 ` [PATCH v6 6/7] riscv: dts: spacemit: Add a PCIe regulator Alex Elder
2025-11-13 21:45 ` [PATCH v6 7/7] riscv: dts: spacemit: PCIe and PHY-related updates Alex Elder
2025-11-14 5:34 ` [PATCH v6 0/7] Introduce SpacemiT K1 PCIe phy and host controller Aurelien Jarno
2025-11-14 6:05 ` Johannes Erdfelt
2025-11-15 4:21 ` Jason Montleon
2025-11-17 17:12 ` Alex Elder
2025-11-17 14:55 ` (subset) " Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251113214540.2623070-1-elder@riscstar.com \
--to=elder@riscstar.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=aurelien@aurel32.net \
--cc=bhelgaas@google.com \
--cc=christian.bruel@foss.st.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dlan@gentoo.org \
--cc=guodong@riscstar.com \
--cc=inochiama@gmail.com \
--cc=johannes@erdfelt.com \
--cc=kishon@kernel.org \
--cc=krishna.chundru@oss.qualcomm.com \
--cc=krzk+dt@kernel.org \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=linux-riscv@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=mayank.rana@oss.qualcomm.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=pjw@kernel.org \
--cc=qiang.yu@oss.qualcomm.com \
--cc=robh@kernel.org \
--cc=shradha.t@samsung.com \
--cc=spacemit@lists.linux.dev \
--cc=thippeswamy.havalige@amd.com \
--cc=vkoul@kernel.org \
--cc=ziyao@disroot.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox