From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.gentoo.org (woodpecker.gentoo.org [140.211.166.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A384D20299B for ; Sat, 3 Jan 2026 21:25:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=140.211.166.183 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767475533; cv=none; b=QMob366BKBpy50KCKsrohamN/HKue4nSZv/8ivC0r/poDi2eAWdLCqBeOjtviTt1fIhJkT3F3um9fCJ9GEMpFHe6IscBPLM5iEro5FKEz9T3ycO5BzDA/FLjfkJZP+deY7tIInkb5qVwxUB2qWCkdkOP5Jfod4qHrhaAG+vE7GM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767475533; c=relaxed/simple; bh=0XxysikKIhfJ2HWukhAtSyyV3B2bH/sVRBEJaYbMZ9k=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=OhDXvlmWUmbHPInncSTT1T4ng9KmNipA4O6IAruKRqFiX4yf9ruEODGB1qkEkPPwdwGbfTQ5W1gwcp25HrpGVCB3dj/kW82K0xcpX0YkvsMeK2MIz0pALgtpgDAf7IcenoXLvjzyQ3i1lCI4lKfS1hYSL0ZZOQCUkCMZyZj0RBE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gentoo.org; spf=pass smtp.mailfrom=gentoo.org; arc=none smtp.client-ip=140.211.166.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gentoo.org Received: from localhost (unknown [116.232.18.222]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange secp256r1 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: dlan) by smtp.gentoo.org (Postfix) with ESMTPSA id A4B2634107F; Sat, 03 Jan 2026 21:25:29 +0000 (UTC) Date: Sun, 4 Jan 2026 05:25:24 +0800 From: Yixun Lan To: Bartosz Golaszewski Cc: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] gpio: spacemit: Add GPIO support for K3 SoC Message-ID: <20260103212524-GYB2053787@gentoo.org> References: <20251229-02-k3-gpio-v1-0-269e76785abb@gentoo.org> <20251229-02-k3-gpio-v1-2-269e76785abb@gentoo.org> <20260102113643-GYA2060252@gentoo.org> <20260102122045-GYA2060493@gentoo.org> Precedence: bulk X-Mailing-List: spacemit@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Hi Bartosz, On 08:38 Fri 02 Jan , Bartosz Golaszewski wrote: > On Fri, 2 Jan 2026 13:20:45 +0100, Yixun Lan said: > > Hi bart, > > > > On 19:36 Fri 02 Jan , Yixun Lan wrote: > >> Hi Bart, > >> > >> On 12:10 Fri 02 Jan , Bartosz Golaszewski wrote: > >> > On Mon, Dec 29, 2025 at 1:47 PM Yixun Lan wrote: > >> > > > >> > > SpacemiT K3 SoC has changed gpio register layout while comparing > >> > > with previous generation, the register offset and bank offset > >> > > need to be adjusted, introduce a compatible data to extend the > >> > > driver to support this. > >> > > > >> > > Signed-off-by: Yixun Lan > >> > > --- > >> > > drivers/gpio/gpio-spacemit-k1.c | 150 ++++++++++++++++++++++++++++------------ > >> > > 1 file changed, 106 insertions(+), 44 deletions(-) > >> > > > >> > > diff --git a/drivers/gpio/gpio-spacemit-k1.c b/drivers/gpio/gpio-spacemit-k1.c > >> > > index eb66a15c002f..02cc5c11b617 100644 > >> > > --- a/drivers/gpio/gpio-spacemit-k1.c > >> > > +++ b/drivers/gpio/gpio-spacemit-k1.c > >> > > @@ -15,28 +15,19 @@ > >> > > #include > >> > > #include > >> > > > > [snip]... > >> > > static u32 spacemit_gpio_bank_index(struct spacemit_gpio_bank *gb) > >> > > { > >> > > return (u32)(gb - gb->sg->sgb); > >> > > @@ -60,13 +70,14 @@ static u32 spacemit_gpio_bank_index(struct spacemit_gpio_bank *gb) > >> > > static irqreturn_t spacemit_gpio_irq_handler(int irq, void *dev_id) > >> > > { > >> > > struct spacemit_gpio_bank *gb = dev_id; > >> > > + struct spacemit_gpio *sg = gb->sg; > >> > > unsigned long pending; > >> > > u32 n, gedr; > >> > > > >> > > - gedr = readl(gb->base + SPACEMIT_GEDR); > >> > > + gedr = readl(gb->base + to_spacemit_gpio_regs(sg)->gedr); > >> > > >> > Since you're already touching all these register accesses - can you > >> > maybe provide dedicated wrapper functions around readl()/writel() and > >> > avoid any file-wide changes in the future if anything requires further > >> > modification? > >> > > >> can you elaborate a bit further on this? > >> I don't get how a wrapper helper could help to avoid file-wide changes.. > >> > > here is my attempt to solve this, define a macro to register address: > > > > #define to_spacemit_gpio_regs(gb) ((gb)->sg->data->reg_offsets) > > > > #define SPACEMIT_GEDR(gb) ((gb)->base + to_spacemit_gpio_regs(gb)->gedr) > > > > gedr = readl(SPACEMIT_GEDR(gb)); > > > > please let me know if this follow your suggestion or not > > > > -- > > Yixun Lan (dlan) > > > > I was thinking more of something like this: > > enum spacemit_gpio_registers { > SPACEMIT_GPLR, > SPACEMIT_GPDR, > ... > }; > > static const unsigned int spacemit_gpio_k1_offsets = { > [SPACEMIT_GPLR] = 0x00, > [SPACEMIT_GPDR] = 0x0c, > ... > }; > > static const unsigned int spacemit_gpio_k3_offsets = ... > > struct spacemit_gpio_data { > const unsigned int *offsets; > u32 bank_offsets[4]; > }; > > static void spacemit_gpio_write(struct spacemit_gpio_bank *gb, > enum spacemit_gpio_registers reg, u32 val) > { > writel(val, gb->base + gb->data->offsets[reg]); > } > Ok, I will implement this, thanks for the detail prototype -- Yixun Lan (dlan)