Re: [PATCH net-next 3/3] net: stmmac: Add glue layer for Spacemit K3 SoC

Inochi Amaoto
2026-01-21T23:56:58Z

On Wed, Jan 21, 2026 at 12:03:36PM +0000, Russell King (Oracle) wrote:
> On Tue, Jan 20, 2026 at 01:05:39PM +0800, Inochi Amaoto wrote:
> > > > + mask = RGMII_RX_DLINE_STEP | RGMII_TX_DLINE_CODE | RGMII_TX_DLINE_EN |
> > > > + RGMII_TX_DLINE_STEP | RGMII_RX_DLINE_CODE | RGMII_RX_DLINE_EN;
> > > > + val = FIELD_PREP(RGMII_TX_DLINE_CODE, tx_config) |
> > > > + FIELD_PREP(RGMII_TX_DLINE_CODE, tx_code) | RGMII_TX_DLINE_EN |
> > > > + FIELD_PREP(RGMII_TX_DLINE_CODE, rx_config) |
> > > > + FIELD_PREP(RGMII_RX_DLINE_CODE, rx_code) | RGMII_RX_DLINE_EN;
> > >
> > > These FIELD_PREP() fields look wrong. Did you mean to use DLINE_CODE
> > > both tx_config and tx_code, and did you mean to use TX_DLINE_CODE for
> > > rx_config ?
> > >
> >
> > This should be RGMII_TX_DLINE_CODE. This is a copy paste error, I
> > will fix it.
>
> Are you sure?
>
> In that case, please change this to:
>
> val = FIELD_PREP(RGMII_TX_DLINE_CODE, tx_config | tx_code |
> rx_config | rx_code) |
> RGMII_TX_DLINE_EN | RGMII_RX_DLINE_EN;
>
> If that isn't what you meant, then your reply is wrong, and it seems
> you're confused, which makes me then question how reliable your
> replies are.
>

That's wrong, I think I have reply it in a wrong way, it should be

RGMII_TX_DLINE_STEP -> tx_config
RGMII_TX_DLINE_CODE -> tx_code
RGMII_RX_DLINE_STEP -> rx_config
RGMII_RX_DLINE_CODE -> rx_code

The RGMII_[RX|TX]_DLINE_STEP register selects which step is used for
rx/tx delay. The RGMII_[RX|TX]_DLINE_CODE register provides the factor
used for calculating the delay. These register are computed in the
spacemit_dwmac_detected_delay_value(). And finally we can got a delay
with "code * step / 10 * 0.9" for both rx and tx.

> > > > + plat_dat->clk_tx_i = devm_clk_get_enabled(&pdev->dev, "tx");
> > > > + if (IS_ERR(plat_dat->clk_tx_i))
> > > > + return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat->clk_tx_i),
> > > > + "failed to get tx clock\n");
> > >
> > > You set plat_dat->clk_tx_i, but you don't point
> > > plat_dat->set_clk_tx_rate at anything, which means the stmmac core
> > > does nothing with this.
> > >
> >
> > Yes, the vendor told me that the internal tx clock rate will be auto
> > changed when the speed rate is changed. So no software interaction
> > is needed.
>
> Please do not assign a clock to clk_tx_i that is not the dwmac
> clk_tx_i input. clk_tx_i is a name used by the Synopsys DWMAC for a
> specific clock.
>
> As you don't need to do anything with it other than to get and enable
> it, consider using just a local variable here.
>

OK, I will use a local variable here.

Regards,
Inochi