From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>,
stable@vger.kernel.org
Subject: Re: [RESEND Patch 2/2] perf/x86/intel: Add missing branch counters constraint apply
Date: Thu, 12 Mar 2026 10:31:28 +0800 [thread overview]
Message-ID: <0a720411-0b24-42eb-9897-856b1175aa82@linux.intel.com> (raw)
In-Reply-To: <20260311201625.GW606826@noisy.programming.kicks-ass.net>
On 3/12/2026 4:16 AM, Peter Zijlstra wrote:
> On Sat, Feb 28, 2026 at 01:33:20PM +0800, Dapeng Mi wrote:
>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>> index 4768236c054b..4b042d71104f 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -4628,6 +4628,19 @@ static inline void intel_pmu_set_acr_caused_constr(struct perf_event *event,
>> event->hw.dyn_constraint &= hybrid(event->pmu, acr_cause_mask64);
>> }
>>
>> +static inline int intel_set_branch_counter_constr(struct perf_event *event,
>> + int *num)
>> +{
>> + if (branch_sample_call_stack(event))
>> + return -EINVAL;
>> + if (branch_sample_counters(event)) {
>> + (*num)++;
>> + event->hw.dyn_constraint &= x86_pmu.lbr_counters;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> static int intel_pmu_hw_config(struct perf_event *event)
>> {
>> int ret = x86_pmu_hw_config(event);
>> @@ -4698,21 +4711,18 @@ static int intel_pmu_hw_config(struct perf_event *event)
>> * group, which requires the extra space to store the counters.
>> */
>> leader = event->group_leader;
>> + if (intel_set_branch_counter_constr(leader, &num))
>> return -EINVAL;
>> leader->hw.flags |= PERF_X86_EVENT_BRANCH_COUNTERS;
>>
>> for_each_sibling_event(sibling, leader) {
>> + if (intel_set_branch_counter_constr(sibling, &num))
>> + return -EINVAL;
>> + }
>> +
> Do the new bit is this, right?
Actually not, the key change is the below one. The last event in the group
is not applied the branch counter constraint.
Assume we have a event group {cycles,instructions,branches}. When the 3rd
event "branches" is created and the function intel_pmu_hw_config() is
called for the "branches" event to check the config. The event leader is
"cycles" and the sibling event has only the "instructions" event at that
time since the 3rd event "branches" is in creation and still not added into
the sibling_list. So for_each_sibling_event() can't really iterate the
"branches" event.
>
>> + if (event != leader) {
>> + if (intel_set_branch_counter_constr(event, &num))
>> return -EINVAL;
>> }
> The point being that for_each_sibling_event() will not have iterated the
> event because its not on the list yet?
Yes.
>
> That wasn't really clear from the changelog and I think that deserves a
> comment as well.
Sure. I would add comment and enhance the changelog to make it clearer. Thanks.
>
> Let me go fix that.
next prev parent reply other threads:[~2026-03-12 2:31 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260228053320.140406-1-dapeng1.mi@linux.intel.com>
2026-02-28 5:33 ` [RESEND Patch 2/2] perf/x86/intel: Add missing branch counters constraint apply Dapeng Mi
2026-03-07 1:27 ` Chen, Zide
2026-03-11 20:03 ` Peter Zijlstra
2026-03-12 2:02 ` Mi, Dapeng
2026-03-11 20:16 ` Peter Zijlstra
2026-03-12 2:31 ` Mi, Dapeng [this message]
2026-03-12 6:41 ` Peter Zijlstra
2026-03-12 6:52 ` Mi, Dapeng
2026-03-12 7:40 ` Peter Zijlstra
2026-03-16 9:50 ` [tip: perf/urgent] " tip-bot2 for Dapeng Mi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0a720411-0b24-42eb-9897-856b1175aa82@linux.intel.com \
--to=dapeng1.mi@linux.intel.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=dapeng1.mi@intel.com \
--cc=eranian@google.com \
--cc=irogers@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=stable@vger.kernel.org \
--cc=thomas.falcon@intel.com \
--cc=xudong.hao@intel.com \
--cc=zide.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox