From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com ([134.134.136.65]:44621 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933927AbeBMQSU (ORCPT ); Tue, 13 Feb 2018 11:18:20 -0500 Subject: Re: [PATCH 4.9 43/92] x86/pti: Do not enable PTI on CPUs which are not vulnerable to Meltdown To: Andi Kleen , Arjan van de Ven References: <20180209133931.211869118@linuxfoundation.org> <20180209133934.259299920@linuxfoundation.org> <20180213150007.GJ26982@kroah.com> <20180213155603.GK10945@tassilo.jf.intel.com> Cc: Greg Kroah-Hartman , Nick Lowe , linux-kernel@vger.kernel.org, stable@vger.kernel.org, David Woodhouse , Thomas Gleixner , Borislav Petkov , gnomes@lxorguk.ukuu.org.uk, ashok.raj@intel.com, karahmed@amazon.de, torvalds@linux-foundation.org, peterz@infradead.org, Borislav Petkov , pbonzini@redhat.com, tim.c.chen@linux.intel.com From: Dave Hansen Message-ID: <0dfbc8c1-87a4-ae51-2fac-bd4c2f674f83@intel.com> Date: Tue, 13 Feb 2018 08:18:17 -0800 MIME-Version: 1.0 In-Reply-To: <20180213155603.GK10945@tassilo.jf.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: On 02/13/2018 07:56 AM, Andi Kleen wrote: > On Tue, Feb 13, 2018 at 07:09:44AM -0800, Arjan van de Ven wrote: >>> So, any hints on what you think should be the correct fix here? >> the patch sure looks correct to me, it now has a nice table for CPU IDs >> including all of AMD (and soon hopefully the existing Intel ones that are not exposed to meltdown) > I don't think the table is nice, it's a white list that would need > to be maintained forever. On Intel, we have that RDCL_NO bit in the ARCH_CAPABILITIES MSR going forward to show that we are not vulnerable. So, at least for Intel we don't need to add new models forever.