* Patch "irqchip/gic-v3-its: Add missing cache flushes" has been added to the 4.1-stable tree
@ 2015-10-17 22:04 gregkh
0 siblings, 0 replies; only message in thread
From: gregkh @ 2015-10-17 22:04 UTC (permalink / raw)
To: marc.zyngier, gregkh, jason, p.fedin, stuart.yoder, tglx
Cc: stable, stable-commits
This is a note to let you know that I've just added the patch titled
irqchip/gic-v3-its: Add missing cache flushes
to the 4.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
irqchip-gic-v3-its-add-missing-cache-flushes.patch
and it can be found in the queue-4.1 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From 5a9a8915c8888b615521b17d70a4342187eae60b Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Sun, 13 Sep 2015 12:14:32 +0100
Subject: irqchip/gic-v3-its: Add missing cache flushes
From: Marc Zyngier <marc.zyngier@arm.com>
commit 5a9a8915c8888b615521b17d70a4342187eae60b upstream.
When the ITS is configured for non-cacheable transactions, make sure
that the allocated, zeroed memory is flushed to the Point of
Coherency, allowing the ITS to observe the zeros instead of random
garbage (or even get its own data overwritten by zeros being evicted
from the cache...).
Fixes: 241a386c7dbb "irqchip: gicv3-its: Use non-cacheable accesses when no shareability"
Reported-and-tested-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Pavel Fedin <p.fedin@samsung.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1442142873-20213-3-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/irqchip/irq-gic-v3-its.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -921,8 +921,10 @@ retry_baser:
* non-cacheable as well.
*/
shr = tmp & GITS_BASER_SHAREABILITY_MASK;
- if (!shr)
+ if (!shr) {
cache = GITS_BASER_nC;
+ __flush_dcache_area(base, alloc_size);
+ }
goto retry_baser;
}
@@ -1163,6 +1165,8 @@ static struct its_device *its_create_dev
return NULL;
}
+ __flush_dcache_area(itt, sz);
+
dev->its = its;
dev->itt = itt;
dev->nr_ites = nr_ites;
Patches currently in stable-queue which might be from marc.zyngier@arm.com are
queue-4.1/arm-kvm-fix-incorrect-device-to-ipa-mapping.patch
queue-4.1/irqchip-gic-v3-its-add-missing-cache-flushes.patch
queue-4.1/arm-kvm-disable-virtual-timer-even-if-the-guest-is-not-using-it.patch
queue-4.1/irqchip-atmel-aic5-use-per-chip-mask-caches-in-mask-unmask.patch
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2015-10-17 22:04 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-17 22:04 Patch "irqchip/gic-v3-its: Add missing cache flushes" has been added to the 4.1-stable tree gregkh
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).