Re: [Intel-gfx] [PATCH 03/12] drm/i915/skl: Update watermarks before the crtc is disabled.

[Ander Conselvan De Oliveira <conselvan2@gmail.com>]

On Thu, 2015-11-19 at 16:07 +0100, Maarten Lankhorst wrote:
> On skylake some of the registers are only writable when the correct
> power wells are enabled. Because of this watermarks have to be updated
> before the crtc turns off, or you get unclaimed register read and write
> warnings.
> 
> This patch needs to be modified slightly to apply to -fixes.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: stable@vger.kernel.org
> Cc: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index db4995406277..5345ffcce51e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4753,7 +4753,7 @@ static void intel_post_plane_update(struct intel_crtc
> *crtc)
>  
>  	crtc->wm.cxsr_allowed = true;
>  
> -	if (pipe_config->wm_changed)
> +	if (pipe_config->wm_changed && pipe_config->base.active)
>  		intel_update_watermarks(&crtc->base);
>  
>  	if (atomic->update_fbc)
> @@ -13362,6 +13362,9 @@ static int intel_atomic_commit(struct drm_device *dev,
>  			dev_priv->display.crtc_disable(crtc);
>  			intel_crtc->active = false;
>  			intel_disable_shared_dpll(intel_crtc);
> +
> +			if (!crtc->state->active)
> +				intel_update_watermarks(crtc);
>  		}
>  	}
>