From: <gregkh@linuxfoundation.org>
To: ard.biesheuvel@linaro.org, gregkh@linuxfoundation.org,
marc.zyngier@arm.com, p.fedin@samsung.com
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "ARM/arm64: KVM: correct PTE uncachedness check" has been added to the 4.1-stable tree
Date: Tue, 26 Jan 2016 22:54:41 -0800 [thread overview]
Message-ID: <145387768138190@kroah.com> (raw)
This is a note to let you know that I've just added the patch titled
ARM/arm64: KVM: correct PTE uncachedness check
to the 4.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-arm64-kvm-correct-pte-uncachedness-check.patch
and it can be found in the queue-4.1 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From 0de58f852875a0f0dcfb120bb8433e4e73c7803b Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Thu, 3 Dec 2015 09:25:22 +0100
Subject: ARM/arm64: KVM: correct PTE uncachedness check
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
commit 0de58f852875a0f0dcfb120bb8433e4e73c7803b upstream.
Commit e6fab5442345 ("ARM/arm64: KVM: test properly for a PTE's
uncachedness") modified the logic to test whether a HYP or stage-2
mapping needs flushing, from [incorrectly] interpreting the page table
attributes to [incorrectly] checking whether the PFN that backs the
mapping is covered by host system RAM. The PFN number is part of the
output of the translation, not the input, so we have to use pte_pfn()
on the contents of the PTE, not __phys_to_pfn() on the HYP virtual
address or stage-2 intermediate physical address.
Fixes: e6fab5442345 ("ARM/arm64: KVM: test properly for a PTE's uncachedness")
Tested-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/arm/kvm/mmu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -218,7 +218,7 @@ static void unmap_ptes(struct kvm *kvm,
kvm_tlb_flush_vmid_ipa(kvm, addr);
/* No need to invalidate the cache for device mappings */
- if (!kvm_is_device_pfn(__phys_to_pfn(addr)))
+ if (!kvm_is_device_pfn(pte_pfn(old_pte)))
kvm_flush_dcache_pte(old_pte);
put_page(virt_to_page(pte));
@@ -310,7 +310,7 @@ static void stage2_flush_ptes(struct kvm
pte = pte_offset_kernel(pmd, addr);
do {
- if (!pte_none(*pte) && !kvm_is_device_pfn(__phys_to_pfn(addr)))
+ if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
kvm_flush_dcache_pte(*pte);
} while (pte++, addr += PAGE_SIZE, addr != end);
}
Patches currently in stable-queue which might be from ard.biesheuvel@linaro.org are
queue-4.1/arm-arm64-kvm-test-properly-for-a-pte-s-uncachedness.patch
queue-4.1/arm64-mm-use-correct-mapping-granularity-under-debug_rodata.patch
queue-4.1/arm-arm64-kvm-correct-pte-uncachedness-check.patch
reply other threads:[~2016-01-27 6:56 UTC|newest]
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