Patch "[PATCH 069/135] irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is" has been added to the 4.4-stable tree

Patch "[PATCH 069/135] irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is" has been added to the 4.4-stable tree

[gregkh]

This is a note to let you know that I've just added the patch titled

    [PATCH 069/135] irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is

to the 4.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     0069-irqchip-gic-v3-Make-sure-read-from-ICC_IAR1_EL1-is-v.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 2b7915f04074318e3c739d2d3efafe77b7ee211e Mon Sep 17 00:00:00 2001
From: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Date: Thu, 4 Feb 2016 10:45:25 -0800
Subject: [PATCH 069/135] irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is
 visible on redestributor

[ Upstream commit 1a1ebd5fb1e203ee8cc73508cc7a38ac4b804596 ]

The ARM GICv3 specification mentions the need for dsb after a read
from the ICC_IAR1_EL1 register:

	4.1.1 Physical CPU Interface:
	The effects of reading ICC_IAR0_EL1 and ICC_IAR1_EL1
	on the state of a returned INTID are not guaranteed
	to be visible until after the execution of a DSB.

Not having this could result in missed interrupts, so let's add the
required barrier.

[Marc: fixed commit message]

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/include/asm/arch_gicv3.h |    1 +
 1 file changed, 1 insertion(+)

--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -103,6 +103,7 @@ static inline u64 gic_read_iar_common(vo
 	u64 irqstat;
 
 	asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat));
+	dsb(sy);
 	return irqstat;
 }
 


Patches currently in stable-queue which might be from tchalamarla@caviumnetworks.com are

queue-4.4/0070-arm64-KVM-Configure-TCR_EL2.PS-at-runtime.patch
queue-4.4/0069-irqchip-gic-v3-Make-sure-read-from-ICC_IAR1_EL1-is-v.patch
queue-4.4/0084-ahci-Workaround-for-ThunderX-Errata-22536.patch