Patch "irqchip/gic: Allow self-SGIs for SMP on UP configurations" has been added to the 4.7-stable tree

Patch "irqchip/gic: Allow self-SGIs for SMP on UP configurations" has been added to the 4.7-stable tree

[gregkh]

This is a note to let you know that I've just added the patch titled

    irqchip/gic: Allow self-SGIs for SMP on UP configurations

to the 4.7-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     irqchip-gic-allow-self-sgis-for-smp-on-up-configurations.patch
and it can be found in the queue-4.7 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 059e232089e45b0befc9933d31209c225e08b426 Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Tue, 9 Aug 2016 07:50:44 +0100
Subject: irqchip/gic: Allow self-SGIs for SMP on UP configurations

From: Marc Zyngier <marc.zyngier@arm.com>

commit 059e232089e45b0befc9933d31209c225e08b426 upstream.

On systems where a single CPU is present, the GIC may not support
having SGIs delivered to a target list. In that case, we use the
self-SGI mechanism to allow the interrupt to be delivered locally.

Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/irqchip/irq-gic.c |    7 +++++++
 1 file changed, 7 insertions(+)

--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -769,6 +769,13 @@ static void gic_raise_softirq(const stru
 	int cpu;
 	unsigned long flags, map = 0;
 
+	if (unlikely(nr_cpu_ids == 1)) {
+		/* Only one CPU? let's do a self-IPI... */
+		writel_relaxed(2 << 24 | irq,
+			       gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
+		return;
+	}
+
 	raw_spin_lock_irqsave(&irq_controller_lock, flags);
 
 	/* Convert our logical CPU mask into a physical one. */


Patches currently in stable-queue which might be from marc.zyngier@arm.com are

queue-4.7/irqchip-gic-allow-self-sgis-for-smp-on-up-configurations.patch