From: <gregkh@linuxfoundation.org>
To: giovanni.cabiddu@intel.com, gregkh@linuxfoundation.org,
herbert@gondor.apana.org.au
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "crypto: qat - zero esram only for DH85x devices" has been added to the 4.9-stable tree
Date: Fri, 10 Feb 2017 14:36:00 +0100 [thread overview]
Message-ID: <1486733760114237@kroah.com> (raw)
This is a note to let you know that I've just added the patch titled
crypto: qat - zero esram only for DH85x devices
to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
crypto-qat-zero-esram-only-for-dh85x-devices.patch
and it can be found in the queue-4.9 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From 685ce0626840e2673fe64ea8807684f7324fec5f Mon Sep 17 00:00:00 2001
From: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Date: Thu, 22 Dec 2016 15:00:24 +0000
Subject: crypto: qat - zero esram only for DH85x devices
From: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
commit 685ce0626840e2673fe64ea8807684f7324fec5f upstream.
Zero embedded ram in DH85x devices. This is not
needed for newer generations as it is done by HW.
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/crypto/qat/qat_common/qat_hal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/crypto/qat/qat_common/qat_hal.c
+++ b/drivers/crypto/qat/qat_common/qat_hal.c
@@ -456,7 +456,7 @@ static int qat_hal_init_esram(struct icp
unsigned int csr_val;
int times = 30;
- if (handle->pci_dev->device == ADF_C3XXX_PCI_DEVICE_ID)
+ if (handle->pci_dev->device != ADF_DH895XCC_PCI_DEVICE_ID)
return 0;
csr_val = ADF_CSR_RD(csr_addr, 0);
@@ -716,7 +716,7 @@ int qat_hal_init(struct adf_accel_dev *a
(void __iomem *)((uintptr_t)handle->hal_cap_ae_xfer_csr_addr_v +
LOCAL_TO_XFER_REG_OFFSET);
handle->pci_dev = pci_info->pci_dev;
- if (handle->pci_dev->device != ADF_C3XXX_PCI_DEVICE_ID) {
+ if (handle->pci_dev->device == ADF_DH895XCC_PCI_DEVICE_ID) {
sram_bar =
&pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)];
handle->hal_sram_addr_v = sram_bar->virt_addr;
Patches currently in stable-queue which might be from giovanni.cabiddu@intel.com are
queue-4.9/crypto-qat-fix-bar-discovery-for-c62x.patch
queue-4.9/crypto-qat-zero-esram-only-for-dh85x-devices.patch
reply other threads:[~2017-02-10 13:40 UTC|newest]
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