From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:50432 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752859AbdDRMuf (ORCPT ); Tue, 18 Apr 2017 08:50:35 -0400 Subject: Patch "perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32()" has been added to the 4.9-stable tree To: peterz@infradead.org, gregkh@linuxfoundation.org, mingo@kernel.org, tglx@linutronix.de, torvalds@linux-foundation.org Cc: , From: Date: Tue, 18 Apr 2017 14:50:16 +0200 Message-ID: <149251981624778@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32() to the 4.9-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: perf-x86-avoid-exposing-wrong-stale-data-in-intel_pmu_lbr_read_32.patch and it can be found in the queue-4.9 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From f2200ac311302fcdca6556fd0c5127eab6c65a3e Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Tue, 11 Apr 2017 10:10:28 +0200 Subject: perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32() From: Peter Zijlstra commit f2200ac311302fcdca6556fd0c5127eab6c65a3e upstream. When the perf_branch_entry::{in_tx,abort,cycles} fields were added, intel_pmu_lbr_read_32() wasn't updated to initialize them. Signed-off-by: Peter Zijlstra (Intel) Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: linux-kernel@vger.kernel.org Fixes: 135c5612c460 ("perf/x86/intel: Support Haswell/v4 LBR format") Signed-off-by: Ingo Molnar Signed-off-by: Greg Kroah-Hartman --- arch/x86/events/intel/lbr.c | 3 +++ 1 file changed, 3 insertions(+) --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -507,6 +507,9 @@ static void intel_pmu_lbr_read_32(struct cpuc->lbr_entries[i].to = msr_lastbranch.to; cpuc->lbr_entries[i].mispred = 0; cpuc->lbr_entries[i].predicted = 0; + cpuc->lbr_entries[i].in_tx = 0; + cpuc->lbr_entries[i].abort = 0; + cpuc->lbr_entries[i].cycles = 0; cpuc->lbr_entries[i].reserved = 0; } cpuc->lbr_stack.nr = i; Patches currently in stable-queue which might be from peterz@infradead.org are queue-4.9/x86-efi-don-t-try-to-reserve-runtime-regions.patch queue-4.9/x86-signals-fix-lower-upper-bound-reporting-in-compat-siginfo.patch queue-4.9/x86-vdso-ensure-vdso32_enabled-gets-set-to-valid-values-only.patch queue-4.9/x86-vdso-plug-race-between-mapping-and-elf-header-setup.patch queue-4.9/cgroup-kthread-close-race-window-where-new-kthreads-can-be-migrated-to-non-root-cgroups.patch queue-4.9/perf-x86-avoid-exposing-wrong-stale-data-in-intel_pmu_lbr_read_32.patch