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From: <gregkh@linuxfoundation.org>
To: vladimir.murzin@arm.com, gregkh@linuxfoundation.org,
	rmk+kernel@armlinux.org.uk
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call" has been added to the 4.9-stable tree
Date: Tue, 23 May 2017 16:47:51 +0200	[thread overview]
Message-ID: <149555087121225@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call

to the 4.9-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-8670-1-v7m-do-not-corrupt-vector-table-around-v7m_invalidate_l1-call.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 6d80594936914e798b1b54b3bfe4bd68d8418966 Mon Sep 17 00:00:00 2001
From: Vladimir Murzin <vladimir.murzin@arm.com>
Date: Mon, 24 Apr 2017 10:40:48 +0100
Subject: ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call

From: Vladimir Murzin <vladimir.murzin@arm.com>

commit 6d80594936914e798b1b54b3bfe4bd68d8418966 upstream.

We save/restore registers around v7m_invalidate_l1 to address pointed
by r12, which is vector table, so the first eight entries are
overwritten with a garbage. We already have stack setup at that stage,
so use it to save/restore register.

Fixes: 6a8146f420be ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/arm/mm/proc-v7m.S |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -147,10 +147,10 @@ __v7m_setup_cont:
 
 	@ Configure caches (if implemented)
 	teq     r8, #0
-	stmneia	r12, {r0-r6, lr}	@ v7m_invalidate_l1 touches r0-r6
+	stmneia	sp, {r0-r6, lr}		@ v7m_invalidate_l1 touches r0-r6
 	blne	v7m_invalidate_l1
 	teq     r8, #0			@ re-evalutae condition
-	ldmneia	r12, {r0-r6, lr}
+	ldmneia	sp, {r0-r6, lr}
 
 	@ Configure the System Control Register to ensure 8-byte stack alignment
 	@ Note the STKALIGN bit is either RW or RAO.


Patches currently in stable-queue which might be from vladimir.murzin@arm.com are

queue-4.9/arm-8670-1-v7m-do-not-corrupt-vector-table-around-v7m_invalidate_l1-call.patch

                 reply	other threads:[~2017-05-23 14:49 UTC|newest]

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