* Patch "perf/x86/intel: Use ULL constant to prevent undefined shift behaviour" has been added to the 4.9-stable tree
@ 2017-07-03 11:32 gregkh
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From: gregkh @ 2017-07-03 11:32 UTC (permalink / raw)
To: colin.king, ak, alexander.levin, alexander.shishkin, eranian,
gregkh, kan.liang, peterz, tglx
Cc: stable, stable-commits
This is a note to let you know that I've just added the patch titled
perf/x86/intel: Use ULL constant to prevent undefined shift behaviour
to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch
and it can be found in the queue-4.9 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From foo@baz Mon Jul 3 13:29:10 CEST 2017
From: Colin King <colin.king@canonical.com>
Date: Wed, 11 Jan 2017 11:43:10 +0000
Subject: perf/x86/intel: Use ULL constant to prevent undefined shift behaviour
From: Colin King <colin.king@canonical.com>
[ Upstream commit ad5013d5699d30ded0cdbbc68b93b2aa28222c6e ]
When x86_pmu.num_counters is 32 the shift of the integer constant 1 is
exceeding 32bit and therefor undefined behaviour.
Fix this by shifting 1ULL instead of 1.
Reported-by: CoverityScan CID#1192105 ("Bad bit shift operation")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Link: http://lkml.kernel.org/r/20170111114310.17928-1-colin.king@canonical.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/x86/events/intel/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3978,7 +3978,7 @@ __init int intel_pmu_init(void)
x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC);
x86_pmu.num_counters = INTEL_PMC_MAX_GENERIC;
}
- x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1;
+ x86_pmu.intel_ctrl = (1ULL << x86_pmu.num_counters) - 1;
if (x86_pmu.num_counters_fixed > INTEL_PMC_MAX_FIXED) {
WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
Patches currently in stable-queue which might be from colin.king@canonical.com are
queue-4.9/perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch
queue-4.9/net-sctp-fix-array-overrun-read-on-sctp_timer_tbl.patch
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2017-07-03 11:32 Patch "perf/x86/intel: Use ULL constant to prevent undefined shift behaviour" has been added to the 4.9-stable tree gregkh
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