From: <gregkh@linuxfoundation.org>
To: Rex.Zhu@amd.com, alexander.deucher@amd.com,
alexander.levin@verizon.com, gregkh@linuxfoundation.org
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "drm/amd/powerplay: fix vce cg logic error on CZ/St." has been added to the 4.9-stable tree
Date: Mon, 03 Jul 2017 13:53:18 +0200 [thread overview]
Message-ID: <1499082798199114@kroah.com> (raw)
This is a note to let you know that I've just added the patch titled
drm/amd/powerplay: fix vce cg logic error on CZ/St.
to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-amd-powerplay-fix-vce-cg-logic-error-on-cz-st.patch
and it can be found in the queue-4.9 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From foo@baz Mon Jul 3 13:33:55 CEST 2017
From: Rex Zhu <Rex.Zhu@amd.com>
Date: Tue, 10 Jan 2017 19:26:49 +0800
Subject: drm/amd/powerplay: fix vce cg logic error on CZ/St.
From: Rex Zhu <Rex.Zhu@amd.com>
[ Upstream commit 3731d12dce83d47b357753ffc450ce03f1b49688 ]
can fix Bug 191281: vce ib test failed.
when vce idle, set vce clock gate, so the clock
in vce domain will be disabled.
when need to encode, disable vce clock gate,
enable the clocks to vce engine.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
@@ -200,7 +200,7 @@ int cz_dpm_powergate_vce(struct pp_hwmgr
cgs_set_clockgating_state(
hwmgr->device,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_CG_STATE_UNGATE);
+ AMD_CG_STATE_GATE);
cgs_set_powergating_state(
hwmgr->device,
AMD_IP_BLOCK_TYPE_VCE,
@@ -218,7 +218,7 @@ int cz_dpm_powergate_vce(struct pp_hwmgr
cgs_set_clockgating_state(
hwmgr->device,
AMD_IP_BLOCK_TYPE_VCE,
- AMD_PG_STATE_GATE);
+ AMD_PG_STATE_UNGATE);
cz_dpm_update_vce_dpm(hwmgr);
cz_enable_disable_vce_dpm(hwmgr, true);
return 0;
Patches currently in stable-queue which might be from Rex.Zhu@amd.com are
queue-4.9/drm-amd-powerplay-fix-vce-cg-logic-error-on-cz-st.patch
queue-4.9/drm-amdgpu-fix-program-vce-instance-logic-error.patch
queue-4.9/drm-amd-powerplay-refine-vce-dpm-update-code-on-cz.patch
reply other threads:[~2017-07-03 11:53 UTC|newest]
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