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From: <gregkh@linuxfoundation.org>
To: fabrice.gasnier@st.com, Jonathan.Cameron@huawei.com,
	Stable@vger.kernel.org
Subject: patch "iio: trigger: stm32-timer: fix a corner case to write preset" added to staging-linus
Date: Mon, 25 Sep 2017 11:21:50 +0200	[thread overview]
Message-ID: <15063313105878@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    iio: trigger: stm32-timer: fix a corner case to write preset

to my staging git tree which can be found at
    git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git
in the staging-linus branch.

The patch will show up in the next release of the linux-next tree
(usually sometime within the next 24 hours during the week.)

The patch will hopefully also be merged in Linus's tree for the
next -rc kernel release.

If you have any questions about this process, please let me know.


>From b7a9776c1f9443326632486fcbd82dca82f8511e Mon Sep 17 00:00:00 2001
From: Fabrice Gasnier <fabrice.gasnier@st.com>
Date: Mon, 18 Sep 2017 12:05:31 +0200
Subject: iio: trigger: stm32-timer: fix a corner case to write preset

Balance timer start routine that sets ARPE: clear it in stop routine.
This fixes a corner case, when timer is used successively as trigger
(with sampling_frequency start/stop routines), then as a counter
(with preset).

Fixes: 93fbe91b5521 ("iio: Add STM32 timer trigger driver")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 drivers/iio/trigger/stm32-timer-trigger.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c
index 4cec28af3ecf..a30ba6e1dfec 100644
--- a/drivers/iio/trigger/stm32-timer-trigger.c
+++ b/drivers/iio/trigger/stm32-timer-trigger.c
@@ -174,6 +174,7 @@ static void stm32_timer_stop(struct stm32_timer_trigger *priv)
 		clk_disable(priv->clk);
 
 	/* Stop timer */
+	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
 	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
 	regmap_write(priv->regmap, TIM_PSC, 0);
 	regmap_write(priv->regmap, TIM_ARR, 0);
-- 
2.14.1

                 reply	other threads:[~2017-09-25  9:21 UTC|newest]

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