From: <gregkh@linuxfoundation.org>
To: fahad.kunnathadi@dexceldesigns.com, andrew@lunn.ch,
davem@davemloft.net, gregkh@linuxfoundation.org
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "net: phy: Fix mask value write on gmii2rgmii converter speed register" has been added to the 4.13-stable tree
Date: Mon, 09 Oct 2017 09:34:21 +0200 [thread overview]
Message-ID: <1507534461119190@kroah.com> (raw)
This is a note to let you know that I've just added the patch titled
net: phy: Fix mask value write on gmii2rgmii converter speed register
to the 4.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
net-phy-fix-mask-value-write-on-gmii2rgmii-converter-speed-register.patch
and it can be found in the queue-4.13 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From foo@baz Mon Oct 9 09:32:35 CEST 2017
From: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Date: Fri, 15 Sep 2017 12:01:58 +0530
Subject: net: phy: Fix mask value write on gmii2rgmii converter speed register
From: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
[ Upstream commit f2654a4781318dc7ab8d6cde66f1fa39eab980a9 ]
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)
This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter
Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/net/phy/xilinx_gmii2rgmii.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/phy/xilinx_gmii2rgmii.c
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -44,7 +44,7 @@ static int xgmiitorgmii_read_status(stru
priv->phy_drv->read_status(phydev);
val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG);
- val &= XILINX_GMII2RGMII_SPEED_MASK;
+ val &= ~XILINX_GMII2RGMII_SPEED_MASK;
if (phydev->speed == SPEED_1000)
val |= BMCR_SPEED1000;
Patches currently in stable-queue which might be from fahad.kunnathadi@dexceldesigns.com are
queue-4.13/net-phy-fix-mask-value-write-on-gmii2rgmii-converter-speed-register.patch
reply other threads:[~2017-10-09 7:34 UTC|newest]
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