Re: [PATCH V2 11/12] MIPS: Loongson-3: Fix CPU UART irq delivery problem

James Hogan
2018-02-20T21:49:31Z

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On Sat, Jan 27, 2018 at 11:23:00AM +0800, Huacai Chen wrote:
> Masking/unmasking the CPU UART irq in CP0_Status (and redirecting it to
> other CPUs) may cause interrupts be lost, especially in multi-package
> machines (Package-0's UART irq cannot be delivered to others). So make
> mask_loongson_irq() and unmask_loongson_irq() be no-ops.
>
> Cc: stable@vger.kernel.org

...

> -static inline void mask_loongson_irq(struct irq_data *d)
> -{
> - clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE));
> - irq_disable_hazard();
> -
> - /* Workaround: UART IRQ may deliver to any core */

Wouldn't removing this self-described "workaround" bring back the
original problem?

At the very least you need a much better explanation of why these
workarounds are no longer applicable and can be safely removed.

Cheers
James

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