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From: <gregkh@linuxfoundation.org>
To: geert+renesas@glider.be, alexander.levin@microsoft.com,
	gregkh@linuxfoundation.org, horms+renesas@verge.net.au
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "arm64: dts: r8a7796: Remove unit-address and reg from integrated cache" has been added to the 4.9-stable tree
Date: Sun, 18 Mar 2018 16:59:08 +0100	[thread overview]
Message-ID: <152138874821103@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    arm64: dts: r8a7796: Remove unit-address and reg from integrated cache

to the 4.9-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-r8a7796-remove-unit-address-and-reg-from-integrated-cache.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From foo@baz Sun Mar 18 16:55:33 CET 2018
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Fri, 3 Mar 2017 14:18:17 +0100
Subject: arm64: dts: r8a7796: Remove unit-address and reg from integrated cache

From: Geert Uytterhoeven <geert+renesas@glider.be>


[ Upstream commit 57a4fd420c6e8a04b6a87ff24d34250cd7c48f15 ]

The Cortex-A57 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 1561f20760ec96db ("arm64: dts: r8a7796: Add Renesas R8A7796 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/boot/dts/renesas/r8a7796.dtsi |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -36,9 +36,8 @@
 			enable-method = "psci";
 		};
 
-		L2_CA57: cache-controller@0 {
+		L2_CA57: cache-controller-0 {
 			compatible = "cache";
-			reg = <0>;
 			power-domains = <&sysc R8A7796_PD_CA57_SCU>;
 			cache-unified;
 			cache-level = <2>;


Patches currently in stable-queue which might be from geert+renesas@glider.be are

queue-4.9/arm64-dts-r8a7796-remove-unit-address-and-reg-from-integrated-cache.patch
queue-4.9/arm-dts-r8a7791-remove-unit-address-and-reg-from-integrated-cache.patch
queue-4.9/arm-dts-r7s72100-fix-ethernet-clock-parent.patch
queue-4.9/arm-dts-r8a7791-correct-parent-of-ssi-clocks.patch
queue-4.9/arm-dts-silk-correct-clock-of-du1.patch
queue-4.9/arm-dts-r8a7792-remove-unit-address-and-reg-from-integrated-cache.patch
queue-4.9/arm-dts-koelsch-correct-clock-frequency-of-x2-du-clock-input.patch
queue-4.9/arm-dts-r8a7794-correct-clock-of-du1.patch
queue-4.9/arm-dts-r8a7794-remove-unit-address-and-reg-from-integrated-cache.patch
queue-4.9/arm-dts-r8a7793-remove-unit-address-and-reg-from-integrated-cache.patch
queue-4.9/arm-dts-r8a7793-correct-parent-of-ssi-clocks.patch
queue-4.9/arm-dts-r8a7790-correct-parent-of-ssi-clocks.patch

                 reply	other threads:[~2018-03-18 15:59 UTC|newest]

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