From: Hanjun Guo <guohanjun@huawei.com>
To: Greg KH <gregkh@linuxfoundation.org>, <stable@vger.kernel.org>
Cc: <yi.zhang@huawei.com>, Marc Zyngier <marc.zyngier@arm.com>,
Hanjun Guo <hanjun.guo@linaro.org>
Subject: [PATCH 4.4 5/6] irqchip/gic-v3: Add missing barrier to 32bit version of gic_read_iar()
Date: Sun, 19 Aug 2018 14:27:40 +0800 [thread overview]
Message-ID: <1534660061-51980-6-git-send-email-guohanjun@huawei.com> (raw)
In-Reply-To: <1534660061-51980-1-git-send-email-guohanjun@huawei.com>
From: Marc Zyngier <marc.zyngier@arm.com>
commit 8f318526a292c5e7cebb82f3f766b83c22343293 upstream.
Commit 1a1ebd5 ("irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is
visible on redestributor") fixed the missing barrier on arm64, but
forgot to update the 32bit counterpart, which has the same requirements.
Let's fix it.
Fixes: 1a1ebd5 ("irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is visible on redestributor")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
arch/arm/include/asm/arch_gicv3.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h
index 7da5503..e08d151 100644
--- a/arch/arm/include/asm/arch_gicv3.h
+++ b/arch/arm/include/asm/arch_gicv3.h
@@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void)
u32 irqstat;
asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat));
+ dsb(sy);
return irqstat;
}
--
1.7.12.4
next prev parent reply other threads:[~2018-08-19 9:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-19 6:27 [PATCH 4.4 0/6] irqchip fixes for stable 4.4 Hanjun Guo
2018-08-19 6:27 ` [PATCH 4.4 1/6] genirq: Delay incrementing interrupt count if it's disabled/pending Hanjun Guo
2018-08-19 6:27 ` [PATCH 4.4 2/6] irqchip/gic-v3-its: Recompute the number of pages on page size change Hanjun Guo
2018-08-19 6:27 ` [PATCH 4.4 3/6] irqchip/gicv3-its: Fix memory leak in its_free_tables() Hanjun Guo
2018-08-19 6:27 ` [PATCH 4.4 4/6] irqchip/gicv3-its: Avoid cache flush beyond ITS_BASERn memory size Hanjun Guo
2018-08-19 6:27 ` Hanjun Guo [this message]
2018-08-19 6:27 ` [PATCH 4.4 6/6] irqchip/gic: Make interrupt ID 1020 invalid Hanjun Guo
2018-09-13 3:11 ` [PATCH 4.4 0/6] irqchip fixes for stable 4.4 Hanjun Guo
2018-09-13 7:00 ` Greg KH
2018-09-13 7:34 ` Hanjun Guo
2018-09-13 12:22 ` Greg KH
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