From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from szxga04-in.huawei.com ([45.249.212.190]:11147 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725933AbeHSJuZ (ORCPT ); Sun, 19 Aug 2018 05:50:25 -0400 From: Hanjun Guo To: Greg KH , CC: , Marc Zyngier , Hanjun Guo Subject: [PATCH 4.4 5/6] irqchip/gic-v3: Add missing barrier to 32bit version of gic_read_iar() Date: Sun, 19 Aug 2018 14:27:40 +0800 Message-ID: <1534660061-51980-6-git-send-email-guohanjun@huawei.com> In-Reply-To: <1534660061-51980-1-git-send-email-guohanjun@huawei.com> References: <1534660061-51980-1-git-send-email-guohanjun@huawei.com> MIME-Version: 1.0 Content-Type: text/plain Sender: stable-owner@vger.kernel.org List-ID: From: Marc Zyngier commit 8f318526a292c5e7cebb82f3f766b83c22343293 upstream. Commit 1a1ebd5 ("irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is visible on redestributor") fixed the missing barrier on arm64, but forgot to update the 32bit counterpart, which has the same requirements. Let's fix it. Fixes: 1a1ebd5 ("irqchip/gic-v3: Make sure read from ICC_IAR1_EL1 is visible on redestributor") Signed-off-by: Marc Zyngier Signed-off-by: Hanjun Guo --- arch/arm/include/asm/arch_gicv3.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h index 7da5503..e08d151 100644 --- a/arch/arm/include/asm/arch_gicv3.h +++ b/arch/arm/include/asm/arch_gicv3.h @@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void) u32 irqstat; asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); + dsb(sy); return irqstat; } -- 1.7.12.4