From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1423EC0650E for ; Thu, 4 Jul 2019 05:55:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DD371218AD for ; Thu, 4 Jul 2019 05:55:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562219714; bh=sUasbt2RohFP+/Y0fbdMXeIB0Q27M8diVT7CsK0EX88=; h=Subject:To:From:Date:List-ID:From; b=KGMPxcN+CjuAMG4Ft39vIUNM+CVbDD+bHJLbUiTaJjTLdy6Zzqh/b6m1XqRxbFSuV JCjxfIjGsDqf8yWHWqN+QvzKEevDE798aRChFP61D0or+hsURoZYUGzO3xEr9fmADb wdp3V7bwnSP3MSgvJDW4NW05uoXdidB0wf4Zrgg8= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725895AbfGDFzO (ORCPT ); Thu, 4 Jul 2019 01:55:14 -0400 Received: from mail.kernel.org ([198.145.29.99]:56858 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725879AbfGDFzO (ORCPT ); Thu, 4 Jul 2019 01:55:14 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 85F3521882; Thu, 4 Jul 2019 05:55:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562219713; bh=sUasbt2RohFP+/Y0fbdMXeIB0Q27M8diVT7CsK0EX88=; h=Subject:To:From:Date:From; b=ym7HWY8AhTogmrlYv9mNzKMEuILS9kiWEEMG4ONCLXb0z8qflNmwBMnzOIo50cHw/ hiFBlwT0yzHhVOb4gP+WFf86vZWchB3MEDDKgrwxyOeCnAUp8iH3mcV7qSsaCMRH/W TKFjDaFxaNWIwBvJyDSu2aFVzTMlptljpfmFm8/Q= Subject: patch "coresight: tmc-etr: alloc_perf_buf: Do not call smp_processor_id from" added to char-misc-next To: suzuki.poulose@arm.com, gregkh@linuxfoundation.org, mathieu.poirier@linaro.org, stable@vger.kernel.org From: Date: Thu, 04 Jul 2019 07:52:18 +0200 Message-ID: <1562219538147150@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org This is a note to let you know that I've just added the patch titled coresight: tmc-etr: alloc_perf_buf: Do not call smp_processor_id from to my char-misc git tree which can be found at git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git in the char-misc-next branch. The patch will show up in the next release of the linux-next tree (usually sometime within the next 24 hours during the week.) The patch will also be merged in the next major kernel release during the merge window. If you have any questions about this process, please let me know. >From 3a8710392db2c70f74aed6f06b16e8bec0f05a35 Mon Sep 17 00:00:00 2001 From: Suzuki K Poulose Date: Thu, 20 Jun 2019 16:12:34 -0600 Subject: coresight: tmc-etr: alloc_perf_buf: Do not call smp_processor_id from preemptible During a perf session we try to allocate buffers on the "node" associated with the CPU the event is bound to. If it is not bound to a CPU, we use the current CPU node, using smp_processor_id(). However this is unsafe in a pre-emptible context and could generate the splats as below : BUG: using smp_processor_id() in preemptible [00000000] code: perf/1743 caller is tmc_alloc_etr_buffer+0x1bc/0x1f0 CPU: 1 PID: 1743 Comm: perf Not tainted 5.1.0-rc6-147786-g116841e #344 Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno Development Platform, BIOS EDK II Feb 1 2019 Call trace: dump_backtrace+0x0/0x150 show_stack+0x14/0x20 dump_stack+0x9c/0xc4 debug_smp_processor_id+0x10c/0x110 tmc_alloc_etr_buffer+0x1bc/0x1f0 etm_setup_aux+0x1c4/0x230 rb_alloc_aux+0x1b8/0x2b8 perf_mmap+0x35c/0x478 mmap_region+0x34c/0x4f0 do_mmap+0x2d8/0x418 vm_mmap_pgoff+0xd0/0xf8 ksys_mmap_pgoff+0x88/0xf8 __arm64_sys_mmap+0x28/0x38 el0_svc_handler+0xd8/0x138 el0_svc+0x8/0xc Use NUMA_NO_NODE hint instead of using the current node for events not bound to CPUs. Fixes: 22f429f19c4135d51e9 ("coresight: etm-perf: Add support for ETR backend") Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Cc: stable # 4.20+ Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20190620221237.3536-3-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 7c81f634ecb4..5d2bf6d18961 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1184,14 +1184,11 @@ static struct etr_buf * alloc_etr_buf(struct tmc_drvdata *drvdata, struct perf_event *event, int nr_pages, void **pages, bool snapshot) { - int node, cpu = event->cpu; + int node; struct etr_buf *etr_buf; unsigned long size; - if (cpu == -1) - cpu = smp_processor_id(); - node = cpu_to_node(cpu); - + node = (event->cpu == -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); /* * Try to match the perf ring buffer size if it is larger * than the size requested via sysfs. -- 2.22.0