From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C35E9C433FF for ; Mon, 5 Aug 2019 10:55:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 904FA2087B for ; Mon, 5 Aug 2019 10:55:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1565002534; bh=PkhB4RMabvc3VKnJ2ElxZQmwXV+VfQaX9BWFdN3o3KM=; h=Subject:To:Cc:From:Date:List-ID:From; b=lQHX57z0Z5U7N0FxM49TsJ7ZFgDZImyNSV2KlU6CeNwqjdeCXzRucxmNeyNKr/d4P WyXACOdaUhmE+L2I2kJZhcBKrwXMBp7pM+ld9zG4Zki5/QbABQCuhQYcXWp6UaggNs orDI1FG4gTMEoRqvqzTrp+46lgRQx11JLzIe/qDo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727259AbfHEKze (ORCPT ); Mon, 5 Aug 2019 06:55:34 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:34319 "EHLO out3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727158AbfHEKzd (ORCPT ); Mon, 5 Aug 2019 06:55:33 -0400 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 5D4FA21785; Mon, 5 Aug 2019 06:55:32 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Mon, 05 Aug 2019 06:55:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:message-id:mime-version:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=SzmGll cDDVzce+r/2Q3VWiIzlS8VfsJYgtdv99j/t08=; b=RfjMIMbqCxr3evY5tNgaTQ z9AFTqnAnfFwgPnexAwIDciyW70KO+TFaS+WuUnrhM70o51SOTUoGaMnU8qHOIzr 7EngFpgiEn63gxdPyAZWx6yDHPcsppl1xJ9seNYRY/NknJixeIPHuLbUTO5ceZKM jANIdpARDAuWv9hY7apAzGgK+ofXM6Cw7J+aZVQVAgtwojXiCdemQM2XAmpmuKvi AZ2G0wz2vHB/PwTT7emGm85n+FYPKxr1ldOED9Q2oE3QREY4JPwaCkBoNQlaXeEu lTidypAFsPfeNEW0ENRSgel/zYvJjT5FEScfTwcfSlgg6fz2tbtq9M/vFgg8AI1Q == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduvddruddtjedgfeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefuvffhfffkgggtgfesthekredttd dtlfenucfhrhhomhepoehgrhgvghhkhheslhhinhhugihfohhunhgurghtihhonhdrohhr gheqnecuffhomhgrihhnpehfrhgvvgguvghskhhtohhprdhorhhgnecukfhppeekfedrke eirdekledruddtjeenucfrrghrrghmpehmrghilhhfrhhomhepghhrvghgsehkrhhorghh rdgtohhmnecuvehluhhsthgvrhfuihiivgeptd X-ME-Proxy: Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) by mail.messagingengine.com (Postfix) with ESMTPA id 9CC9F80064; Mon, 5 Aug 2019 06:55:31 -0400 (EDT) Subject: FAILED: patch "[PATCH] drm/i915/perf: fix ICL perf register offsets" failed to apply to 4.19-stable tree To: lionel.g.landwerlin@intel.com, jani.nikula@intel.com, kenneth@whitecape.org, stable@vger.kernel.org Cc: From: Date: Mon, 05 Aug 2019 12:55:29 +0200 Message-ID: <156500252979126@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org The patch below does not apply to the 4.19-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . thanks, greg k-h ------------------ original commit in Linus's tree ------------------ >From 95eef14cdad150fed43147bcd4f29eea3d0a3f03 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Mon, 10 Jun 2019 11:19:14 +0300 Subject: [PATCH] drm/i915/perf: fix ICL perf register offsets We got the wrong offsets (could they have changed?). New values were computed off an error state by looking up the register offset in the context image as written by the HW. Signed-off-by: Lionel Landwerlin Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL") Cc: # v4.18+ Acked-by: Kenneth Graunke Link: https://patchwork.freedesktop.org/patch/msgid/20190610081914.25428-1-lionel.g.landwerlin@intel.com (cherry picked from commit 8dcfdfb4501012a8d36d2157dc73925715f2befb) Signed-off-by: Jani Nikula diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index a700c5c3d167..1ae06a1b6749 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -3477,9 +3477,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv) dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set; dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set; - dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128; - dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de; - + if (IS_GEN(dev_priv, 10)) { + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128; + dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de; + } else { + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124; + dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e; + } dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16); } }