From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E54CC352A3 for ; Thu, 13 Feb 2020 04:15:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 40E362173E for ; Thu, 13 Feb 2020 04:15:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1581567307; bh=vmHF7OMmYZlcsV19LDGHjy2ajei4sFALOOLEvnB7K5M=; h=Subject:To:Cc:From:Date:List-ID:From; b=S5kWDbN4SaYj7w7tipzpS+1nq/rNMgNYFv8p7vcCqEtbHI9TTimBYWx9UCfjoC8QJ 9DoLSh+kTeUmgpTB7bZtRJr134posg1/EYMsPfDEdFlF6lB42U7XduToLHiC4b0EXH 5N1qlcRukfhSdwr/1KX9Aeir+VN+Ngg+i+j3J8Js= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729470AbgBMEPG (ORCPT ); Wed, 12 Feb 2020 23:15:06 -0500 Received: from out2-smtp.messagingengine.com ([66.111.4.26]:37997 "EHLO out2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729443AbgBMEPG (ORCPT ); Wed, 12 Feb 2020 23:15:06 -0500 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 996FF22056; Wed, 12 Feb 2020 23:15:05 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Wed, 12 Feb 2020 23:15:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:message-id:mime-version:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm2; bh=s7HJOZ V9xE+MJcxeyz/aORLgMuUPo+jppjbndy+F1r4=; b=MhM1unObOqkQh3hv9+8YkY dMtv+wDoW++K/e32IgzVmvoLtEeYF+h20AsW5iIk1aYTtYwIItk/Q7gowQ1e1Ylk oRdAzhUTmdGgkS1ss1yQomAoEUvbyys/1Qf8ZH69jsobQf4dQccZXuOxPWFoRxwu OtwBpy4LhaywiRI87FWxz+naFqRsJte0nmCMzuoyIy+309QOlKtGnaVfUvjNdD2U Dp9klT+P1EX54aAxmYvGQ/JdEkZUAWVXOmy7P/x6W9G1Z6YRFWBHNPfj+nQAY6zO gvr5XuNhnWyEbYvKrHjPgAOY+M/UCBCRl2MnfgybPRL+BeWAUrqa/MeuwUiJ9sIw == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedugedrieejgdejtdcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecunecujfgurhepuffvhfffkfggtgfgsehtkeertddttd flnecuhfhrohhmpeeoghhrvghgkhhhsehlihhnuhigfhhouhhnuggrthhiohhnrdhorhhg qeenucffohhmrghinhepkhgvrhhnvghlrdhorhhgnecukfhppedvtdelrdefjedrleejrd duleegnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhep ghhrvghgsehkrhhorghhrdgtohhm X-ME-Proxy: Received: from localhost (unknown [209.37.97.194]) by mail.messagingengine.com (Postfix) with ESMTPA id 308533280059; Wed, 12 Feb 2020 23:15:05 -0500 (EST) Subject: FAILED: patch "[PATCH] KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset" failed to apply to 4.14-stable tree To: eric.auger@redhat.com, andrew.murray@arm.com, maz@kernel.org Cc: From: Date: Wed, 12 Feb 2020 20:15:04 -0800 Message-ID: <1581567304238176@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org The patch below does not apply to the 4.14-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to . thanks, greg k-h ------------------ original commit in Linus's tree ------------------ >From 3837407c1aa1101ed5e214c7d6041e7a23335c6e Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Fri, 24 Jan 2020 15:25:32 +0100 Subject: [PATCH] KVM: arm64: pmu: Don't increment SW_INCR if PMCR.E is unset The specification says PMSWINC increments PMEVCNTR_EL1 by 1 if PMEVCNTR_EL0 is enabled and configured to count SW_INCR. For PMEVCNTR_EL0 to be enabled, we need both PMCNTENSET to be set for the corresponding event counter but we also need the PMCR.E bit to be set. Fixes: 7a0adc7064b8 ("arm64: KVM: Add access handler for PMSWINC register") Signed-off-by: Eric Auger Signed-off-by: Marc Zyngier Reviewed-by: Andrew Murray Acked-by: Marc Zyngier Link: https://lore.kernel.org/r/20200124142535.29386-2-eric.auger@redhat.com diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index 8731dfeced8b..c3f8b059881e 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -486,6 +486,9 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) if (val == 0) return; + if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) + return; + enable = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); for (i = 0; i < ARMV8_PMU_CYCLE_IDX; i++) { if (!(val & BIT(i)))