From: "tip-bot2 for Dapeng Mi" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Dapeng Mi <dapeng1.mi@linux.intel.com>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
stable@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org
Subject: [tip: perf/core] perf/x86/intel: Always reprogram ACR events to prevent stale masks
Date: Tue, 05 May 2026 10:50:00 -0000 [thread overview]
Message-ID: <177797820071.424702.6693023256397751621.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20260430002558.712334-3-dapeng1.mi@linux.intel.com>
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 8ba0b706a485b1e607594cf4210786d517ad1611
Gitweb: https://git.kernel.org/tip/8ba0b706a485b1e607594cf4210786d517ad1611
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>
AuthorDate: Thu, 30 Apr 2026 08:25:55 +08:00
Committer: Peter Zijlstra <peterz@infradead.org>
CommitterDate: Tue, 05 May 2026 12:47:21 +02:00
perf/x86/intel: Always reprogram ACR events to prevent stale masks
Members of an ACR group are logically linked via a bitmask of their
hardware counter indices. If some members of the group are assigned new
hardware counters during rescheduling, even events that keep their
original counter index must be updated with a new mask.
Without this, an event will continue to use a stale acr_mask that
references the old indices of its group peers. Ensure all ACR events are
reprogrammed during the scheduling path to maintain consistency across
the group.
Fixes: ec980e4facef ("perf/x86/intel: Support auto counter reload")
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260430002558.712334-3-dapeng1.mi@linux.intel.com
---
arch/x86/events/core.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 810ab21..4b9e105 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -1294,13 +1294,16 @@ int x86_perf_rdpmc_index(struct perf_event *event)
return event->hw.event_base_rdpmc;
}
-static inline int match_prev_assignment(struct hw_perf_event *hwc,
+static inline int match_prev_assignment(struct perf_event *event,
struct cpu_hw_events *cpuc,
int i)
{
+ struct hw_perf_event *hwc = &event->hw;
+
return hwc->idx == cpuc->assign[i] &&
- hwc->last_cpu == smp_processor_id() &&
- hwc->last_tag == cpuc->tags[i];
+ hwc->last_cpu == smp_processor_id() &&
+ hwc->last_tag == cpuc->tags[i] &&
+ !is_acr_event_group(event);
}
static void x86_pmu_start(struct perf_event *event, int flags);
@@ -1346,7 +1349,7 @@ static void x86_pmu_enable(struct pmu *pmu)
* - no other event has used the counter since
*/
if (hwc->idx == -1 ||
- match_prev_assignment(hwc, cpuc, i))
+ match_prev_assignment(event, cpuc, i))
continue;
/*
@@ -1367,7 +1370,7 @@ static void x86_pmu_enable(struct pmu *pmu)
event = cpuc->event_list[i];
hwc = &event->hw;
- if (!match_prev_assignment(hwc, cpuc, i))
+ if (!match_prev_assignment(event, cpuc, i))
x86_assign_hw_event(event, cpuc, i);
else if (i < n_running)
continue;
next prev parent reply other threads:[~2026-05-05 10:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260430002558.712334-1-dapeng1.mi@linux.intel.com>
2026-04-30 0:25 ` [Patch v4 1/5] perf/x86/intel: Improve validation and configuration of ACR masks Dapeng Mi
2026-05-05 10:50 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-04-30 0:25 ` [Patch v4 2/5] perf/x86/intel: Always reprogram ACR events to prevent stale masks Dapeng Mi
2026-05-05 10:50 ` tip-bot2 for Dapeng Mi [this message]
2026-04-30 0:25 ` [Patch v4 3/5] perf/x86/intel: Disable PMI for self-reloaded ACR events Dapeng Mi
2026-05-05 10:49 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
2026-04-30 0:25 ` [Patch v4 4/5] perf/x86/intel: Enable auto counter reload for DMR Dapeng Mi
2026-05-05 10:49 ` [tip: perf/core] " tip-bot2 for Dapeng Mi
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