From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EF2403DD534; Mon, 23 Mar 2026 19:56:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774295783; cv=none; b=JpqXZ4ro/nyqWGmZCiZ4XSDeEKZDtrGS5pyh7yYliXkPFzZ3CXaSawy5m01orMNu90NnGTh292UV5SK1p1x4F+i4ndihHPqBQNEIjTqqxcySf65NhDxt56EqN85wRI7VzHeU+QDpZI4Kazwg3BpAk7Pq7EQMvH08JOTC8shz+8Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774295783; c=relaxed/simple; bh=ZybiVf9Ui2KshcMzVZ5jtaXR9MAGtDDwOwCMSn4/ewA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=IZchCEA9Me5jmyq3GjoMqTGIVp1M7coUN3YulGht9aS5kCJdP1i1NBFqDeyzly9qM9W7tKO5Ioi4QCQuawM7CemRJpUZyO7qc6FtMOMo/czlk2jsVR0pnPK4h4pw8jMrfsACBIz9bMhDbvQ05SElBxtNIUol49ZjWR2EXNhBL2M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4238414BF; Mon, 23 Mar 2026 12:56:14 -0700 (PDT) Received: from [10.57.59.110] (unknown [10.57.59.110]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 63E533F694; Mon, 23 Mar 2026 12:56:14 -0700 (PDT) Message-ID: <1d364f19-7cf4-400b-ad12-6380152e44e5@arm.com> Date: Mon, 23 Mar 2026 19:56:10 +0000 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] arm64: mm: Handle invalid large leaf mappings correctly To: Ryan Roberts , Catalin Marinas , Will Deacon , "David Hildenbrand (Arm)" , Dev Jain , Yang Shi , Suzuki K Poulose , Jinjiang Tu Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20260323130317.1737522-1-ryan.roberts@arm.com> <20260323130317.1737522-3-ryan.roberts@arm.com> <588b2b4f-9cf6-43e5-b0e5-55820c74cbbb@arm.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 23/03/2026 18:25, Ryan Roberts wrote: >>> @@ -132,11 +137,12 @@ static int __change_memory_common(unsigned long start, unsigned long size, >>> ret = update_range_prot(start, size, set_mask, clear_mask); >>> >>> /* >>> - * If the memory is being made valid without changing any other bits >>> - * then a TLBI isn't required as a non-valid entry cannot be cached in >>> - * the TLB. >>> + * If the memory is being switched from present-invalid to valid without >>> + * changing any other bits then a TLBI isn't required as a non-valid >>> + * entry cannot be cached in the TLB. >>> */ >>> - if (pgprot_val(set_mask) != PTE_VALID || pgprot_val(clear_mask)) >>> + if (pgprot_val(set_mask) != (PTE_MAYBE_NG | PTE_VALID) || >> It isn't obvious to understand where all those PTE_MAYBE_NG come from if >> one hasn't realised that PTE_PRESENT_INVALID overlays PTE_NG. >> >> Since for this purpose we always set/clear both PTE_VALID and >> PTE_MAYBE_NG, maybe we could define some macro as PTE_VALID | >> PTE_MAYBE_NG, as a counterpart to PTE_PRESENT_INVALID? > How about: > > #define PTE_PRESENT_VALID_KERNEL (PTE_VALID | PTE_MAYBE_NG) > > The user space equivalent has NG clear, so important to clarify that this is the > kernel value, I think. Sounds good to me. - Kevin