From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Message-Id: <20121228190353.750132005@decadent.org.uk> Date: Fri, 28 Dec 2012 20:05:22 +0100 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: akpm@linux-foundation.org, alan@lxorguk.ukuu.org.uk, Alex Deucher Subject: [ 112/173] drm/radeon/dce32+: use fractional fb dividers for high clocks In-Reply-To: <20121228190330.025298996@decadent.org.uk> Sender: linux-kernel-owner@vger.kernel.org List-ID: 3.2-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Deucher commit a02dc74b317d78298cb0587b9b1f6f741fd5c139 upstream. Fixes flickering with some high res montiors. Signed-off-by: Alex Deucher [bwh: Backported to 3.2: use pll->flags instead of radeon_crtc->pll_flags] Signed-off-by: Ben Hutchings --- drivers/gpu/drm/radeon/atombios_crtc.c | 2 ++ 1 file changed, 2 insertions(+) --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -544,6 +544,8 @@ static u32 atombios_adjust_pll(struct dr /* use frac fb div on APUs */ if (ASIC_IS_DCE41(rdev)) pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; + if (ASIC_IS_DCE32(rdev) && mode->clock > 165000) + pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; } else { pll->flags |= RADEON_PLL_LEGACY;