From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Helge Deller Subject: [ 21/72] parisc: document the shadow registers Date: Thu, 18 Jul 2013 22:25:38 -0700 Message-Id: <20130719052601.314654160@linuxfoundation.org> In-Reply-To: <20130719052559.852627424@linuxfoundation.org> References: <20130719052559.852627424@linuxfoundation.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: 3.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Helge Deller commit a83f58bcb24003b9de2364de7c829a263423ead7 upstream. Signed-off-by: Helge Deller Signed-off-by: Greg Kroah-Hartman --- Documentation/parisc/registers | 8 ++++++++ 1 file changed, 8 insertions(+) --- a/Documentation/parisc/registers +++ b/Documentation/parisc/registers @@ -78,6 +78,14 @@ Shadow Registers used by interruption h TOC enable bit 1 ========================================================================= + +The PA-RISC architecture defines 7 registers as "shadow registers". +Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce +the state save and restore time by eliminating the need for general register +(GR) saves and restores in interruption handlers. +Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25. + +========================================================================= Register usage notes, originally from John Marvin, with some additional notes from Randolph Chung.