From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Derek Browne , "Alvin (Weike) Chen" , Ulf Hansson , Chang Rebecca Swee Fun Subject: [PATCH 3.14 118/203] mmc: sdhci-pci: SDIO host controller support for Intel Quark X1000 Date: Wed, 12 Nov 2014 10:16:28 +0900 Message-Id: <20141112011548.087788788@linuxfoundation.org> In-Reply-To: <20141112011542.686743533@linuxfoundation.org> References: <20141112011542.686743533@linuxfoundation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Sender: linux-kernel-owner@vger.kernel.org List-ID: 3.14-stable review patch. If anyone has any objections, please let me know. ------------------ From: Derek Browne commit 43e968cec79b6334cf7cb3e11184cce720541712 upstream. This patch is to enable SDIO host controller for Intel Quark X1000. Signed-off-by: Derek Browne Signed-off-by: Alvin (Weike) Chen Signed-off-by: Ulf Hansson Signed-off-by: Chang Rebecca Swee Fun Signed-off-by: Greg Kroah-Hartman --- drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++ drivers/mmc/host/sdhci-pci.h | 1 + 2 files changed, 13 insertions(+) --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -103,6 +103,10 @@ static const struct sdhci_pci_fixes sdhc SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, }; +static const struct sdhci_pci_fixes sdhci_intel_qrk = { + .quirks = SDHCI_QUIRK_NO_HISPD_BIT, +}; + static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) { slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; @@ -732,6 +736,14 @@ static const struct pci_device_id pci_id }, { + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_QRK_SD, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .driver_data = (kernel_ulong_t)&sdhci_intel_qrk, + }, + + { .vendor = PCI_VENDOR_ID_INTEL, .device = PCI_DEVICE_ID_INTEL_MRST_SD0, .subvendor = PCI_ANY_ID, --- a/drivers/mmc/host/sdhci-pci.h +++ b/drivers/mmc/host/sdhci-pci.h @@ -17,6 +17,7 @@ #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5 #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6 +#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7 /* * PCI registers